lan91c95 Standard Microsystems Corp., lan91c95 Datasheet - Page 64

no-image

lan91c95

Manufacturer Part Number
lan91c95
Description
Isa/pcmcia Full Duplex Single-chip Ethernet And Modem Controller With Ram
Manufacturer
Standard Microsystems Corp.
Datasheet
I/O SPACE - BANK1
For ISA mode only, this register holds the I/O address decode option chosen for the I/O and ROM space. It
is part of the EEPROM saved setup, and is not usually modified during run-time. NOTE: This register
should ONLY be used in ISA mode. In PCMCIA mode, this register is read only.
A15 - A13 and A9 - A5 - These bits are compared
in ISA mode against the I/O address on the bus to
determine the IOBASE for LAN91C95 registers.
The 64k I/O space is fully decoded by the
LAN91C95 down to a 16 location space, therefore
the unspecified address lines A4, A10, A11 and
A12 must be all zeros.
ROM SIZE - Determines the ROM decode area in
ISA mode memory space as follows:
RA18-RA14 - These bits are compared in ISA
mode against the memory address on the bus to
determine if the ROM is being accessed, as a
function of the ROM SIZE. ROM accesses are read
OFFSET
BYTE
BYTE
HIGH
LOW
00 = ROM disable
01 = 16k: RA14-18 define ROM select
10 = 32k: RA15-18 define ROM select
11 = 64k: RA16-18 define ROM select
2
A15
0
0
ROM SIZE
BASE ADDRESS REGISTER
A14
0
1
NAME
RA18
A13
0
1
RA17
A9
64
1
0
only memory accesses defined by nMEMRD going
low.
For a full decode of the address space unspecified
upper address lines have to be:
All bits in this register are loaded from the serial
EEPROM in ISA Mode only. In PCMCIA mode, the
I/O base is set to the default value (as in ISA
mode) as defined below.
The I/O base decode defaults to 300h (namely, the
high byte defaults to 18h). ROM SIZE defaults to
01. ROM decode defaults to CC000 (namely the
low byte defaults to 67h).
A19 = "1", A20-A23 lines are not directly
decoded, however ISA systems will only
activate nMEMRD only when A20-A23=0.
RA16
A8
READ/WRITE
1
0
TYPE
RA15
A7
0
1
RA14
A6
0
1
SYMBOL
BAR
A5
0
1

Related parts for lan91c95