lan91c95 Standard Microsystems Corp., lan91c95 Datasheet - Page 44
lan91c95
Manufacturer Part Number
lan91c95
Description
Isa/pcmcia Full Duplex Single-chip Ethernet And Modem Controller With Ram
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LAN91C95.pdf
(144 pages)
- Current page: 44 of 144
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I/O Base Register 0 & 1 (I/O Base 0 & 1) Address 800Ah & 800Ch
800Ah - Ethernet I/O BASE Register 0
800Ch - Ethernet I/O BASE Register 1
The I/O Base registers determine the base
address of the I/O range used to access function
specific registers. These registers allow the
function's registers to be placed anywhere in the
host's I/O space. I/O Base 0 contains the low
order byte (A7-A0) and I/O Base 1 contains the
high order byte (A15-A8). Since the Ethernet
function requires 16 I/O locations, bits 3-0 of I/O
Base 0 are always 0.
A15
A7
7
0
7
0
A14
A6
6
0
6
0
A13
A5
5
0
5
0
A12
A4
4
0
4
0
44
Only A15 to A4 are decoded by the controller
(64K address space), it is up to the host to
resolve any conflicts with addressing above
64K. The default decode value is 300h
(A9=A8=1, others=0). NOTE: These registers
are ignored in ISA mode. These registers are
accessable even if the “Enable Base and Limit)
bit in the MCOR is cleared (0).
A11
3
0
0
3
0
A10
2
0
0
2
0
A9
1
0
0
1
1
A8
0
0
0
0
1
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