lan91c95 Standard Microsystems Corp., lan91c95 Datasheet - Page 83

• Manufacturer Part Number: lan91c95
• Description: Isa/pcmcia Full Duplex Single-chip Ethernet And Modem Controller With Ram
• Manufacturer: Standard Microsystems Corp.

PC Card 5.0 treats the individual functions of a
multifunction
independently.
(C&SS) 5.0 is designed to provide the support
for determining the function generating the
interrupt and informing relevant drivers.
registers for the two functions are treated as
independent sets. One of the only requirements
is to set the functions’ I/O base registers with
different values to avoid any access conflict.
MEMORY ARCHITECTURE
The concept of presenting the shared RAM as
FIFO of packets, with a memory management
unit allocating memory on a per packet basis
responds to the following needs:
Memory allocation for receive vs. transmit - A
fixed partition between receive and transmit area
would
dynamically allocate it to transmit and receive
represents almost the equivalent of duplicating
the memory size for some workstation type of
drivers.
Software overhead - By presenting a FIFO of
packets, the software driver does not have to
waste any time in calculating pointers for the
different buffers that make up different packets.
The driver usually deals with one packet at a
time. With this approach, packets are always
accessible at the same fixed address, and
access is provided to any byte of the packet.
Headers can be analyzed without reading the
entire packet. The packet can be read or written
with a block move operation.
Multiple upper layer support - The LAN91C95
facilitates interfacing to multiple upper layer
protocols
processing
scheme like ODI or NDIS drivers are supported
by copying a small part of the received packet
and letting the upper layer provide a pointer for
the rest of the data. If the upper layer indicates
not
because
flexibility.
be
Card and Socket Services
efficient.
PCMCIA
of
A
the
receive
Being
receive
THEORY OF OPERATION
application
lookahead
able
packet
The
to
83
it does not want a specific part of the packet, a
block move operation starting at any particular
offset can be done.
processing is also supported: if memory for one
packet is not yet available, receive packet
processing can continue.
Efficiency - Lacking any level of indirection or
linked lists of pointers, virtually all the memory
is used for data.
forward links and pointers at all. This simplicity
and memory efficiency is accomplished without
giving up the benefits of linked lists which is
unlimited
reception without CPU intervention for as long
as memory is available.
FULL DUPLEX ETHERNET SUPPORT
Full Duplex Ethernet operation refers to the
ability of the network (or parts of it) to
simultaneously transmit and receive packets.
The CSMA/CD protocol used by Ethernet for
accessing a shared medium is inherently half
duplex , and so is the 10BASE-T physical layer
where
activity is interpreted as a collision.
The LAN91C95 supports two types of Full
Duplex operation:
1.
2.
Full Duplex mode for diagnostic purposes
only, where the received packet is the
transmit packet being looped back. This
mode is enabled using the FDUPLX bit in
the TCR.
algorithm is used to gain access to the
media.
FDSE (Full Duplex Switched Ethernet).
Enabled by FDSE bit in TCR bit. When the
LAN91C95 is configured for FDSE, its
transmit and receive paths will operate
independently
functions are disabled such as Carrier
Sense.
simultaneous
back-to-back
In this mode the CSMA/CD
There are no descriptors,
and
transmit
Out of order receive
transmission
some
and
CSMA/CD
receive
and