lan91c95 Standard Microsystems Corp., lan91c95 Datasheet - Page 84

• Manufacturer Part Number: lan91c95
• Description: Isa/pcmcia Full Duplex Single-chip Ethernet And Modem Controller With Ram
• Manufacturer: Standard Microsystems Corp.

Behavior in FDSE Mode
The main 802.3 section affected by FDSE is
4.2.8 where the Frame Transmission procedural
model is presented. The changes are:
1.
2.
No deferral - The transmit channel is
dedicated and always available - The device
will transmit whenever it has a packet ready
to be sent, while respecting the interframe
spacing between transmit packets.
No collision detection - There are no
collisions in a switched environment.
The EPH implementation of the procedural
model uses as ‘collisionDetect’ the MAC
collision input, sourced from the 10BASE-T
front end, AUI front end, or External Endec
interface. This collision input is observed by
the
‘transmitting’
Preamble, Data, Pad, and CRC states. If
Transmit
is
State
true,
that
Machine
is
during
while
84
3.
Magic Packet Support
If the WAKEUP_EN bit in the Control Register
(Bank1, Offset C) is set, the controller will come
out of any powerdown mode. If this bit is not
set, this functionality is disabled.
When a Magic Packet is received, the ethernet
controller will generate an interrupt causing the
host to initiate a service routine to find the
source of the event. The Interrupt bit in the
ECSR is also set if the host plans on polling the
controller for Wakeup status.
collision is active during any of these states
the state machine transitions to JAM and
BACKOFF states.
10BASE-T loopback - Typically 10BASE-T
drivers are internally looped back to the
differential receivers.