lan91c95 Standard Microsystems Corp., lan91c95 Datasheet - Page 40

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lan91c95

Manufacturer Part Number
lan91c95
Description
Isa/pcmcia Full Duplex Single-chip Ethernet And Modem Controller With Ram
Manufacturer
Standard Microsystems Corp.
Datasheet
PCMCIA Attribute Memory: Address 0-
7FFEh
The Attribute Memory is implemented using a
combination of interrnal SRAM and external
parallel EEPROM, ROM or Flash ROM. The
internal SRAM is initialized during power up using
the serial EEPROM. This serial EEPROM in
PCMCIA mode is used for the CIS (Card
Information Structure). If no serial EEPROM is
used, the parallel EEPROM must be used. Internal
CIS RAM address space is replaced by part of the
external parallel EEPROM in this case.
In ISA mode, the serial EEPROM is used for
configuration and IEEE Node address making it
software compatible to the LAN9000 family of
Ethernet LAN Controllers. In ISA mode, the
EEPROM is optional requiring a minimum size of
64 X 16 bit word addresses. In PCMCIA mode, the
minimum serial EEPROM (if used) size can be 64
X 16 up to 256 X 16.
This combination of internal and external attribute
memory allows the designer to reduce costs by
using a serial EEPROM device when using up to
512 bytes of “Card Information” and, if additional
memory is needed, an external EEPROM may be
used. When the LAN91C95 goes into powerdown
mode, the internal CIS data buffer RAM is re-
initialized.
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The LAN91C95 generates the appropriate control
lines (nFCS and nFWE) to read and write the
Attribute memory, and it tri-states the data bus
during external Attribute Memory accesses. Note
that the parallel EEPROM is selected for the first
512 byte CIS information also in the absence of the
serial EEPROM in PCMCIA mode.
locations are used.
Internal VS External Attribute Memory Map
The Internal VS External EPROM attribute memory
decodes are shown below. This allows the designer
to not require an external EPROM device if the
single or multi-function PCMCIA card needs less
than 512 bytes of configuration information. As can
be seen in the map, if 512 bytes of CIS or less is
required, the nFCS and nFWE output pins of the
LAN91C95 need not be
used (if serial EEPROM is being used). Internal to
the LAN91C95, the memory addressing logic will
allow byte or word on odd byte address access
(A0=1), the LAN91C95 will generate an arbitrary
value of zero (0) since the PCMCIA specification
states that the high byte of a word access in
attribute memory is a don’t care. This allows
backward compatibility to 8 bit hosts.
Only even

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