mfrc531 NXP Semiconductors, mfrc531 Datasheet - Page 11

• Manufacturer Part Number: mfrc531
• Description: Iso/iec 14443 Reader Ic
• Manufacturer: NXP Semiconductors

NXP Semiconductors
MFRC531_34
Product data sheet
PUBLIC
9.1.4.2 SPI write data
Table 8.
[1]
The structure shown in
up to n-data bytes. The first byte sent defines both the mode and the address.
Table 9.
The address byte must meet the following criteria:
SPI write mode writes all data to the address defined in byte 0 enabling effective write
cycles to the FIFO buffer.
Table 10.
[1]
Remark: The data bus pins D7 to D1 must be disconnected.
Refer to
Address
(MOSI)
byte 0
byte 1 to byte n reserved address address address address address address reserved
byte n + 1
MOSI
MISO
Address line
(MOSI)
byte 0
byte 1 to byte
n + 1
•
•
•
All reserved bits must be set to logic 0.
the MSB of the first byte sets the mode. To write data to the MFRC531, the MSB is set
to logic 0
bits [6:1] define the address
the LSB should be set to logic 0.
All reserved bits must be set to logic 0.
Section 13.4.4 on page 97
SPI read address
SPI write data
SPI write address
Byte 0
address
XX
Bit 7
(MSB)
1
0
Bit 7
(MSB)
0
data
Rev. 3.4 — 26 January 2010
Table 9
Bit 6
address address address address address address reserved
data
Bit 6
address address address address address address reserved
0
Byte 1
data 0
XX
056634
must be used to write data using SPI. It is possible to write
Bit 5
data
Bit 5
0
for the timing specification.
data 1
Byte 2
XX
Bit 4
data
Bit 4
0
Bit 3
data
Bit 3
0
...
...
...
Byte n
data n − 1
XX
Bit 2
data
Bit 2
0
ISO/IEC 14443 reader IC
MFRC531
© NXP B.V. 2010. All rights reserved.
Bit 1
0
Bit 1
data
Byte n + 1
data n
XX
Bit 0
(LSB)
0
Bit 0
(LSB)
data
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