mfrc531 NXP Semiconductors, mfrc531 Datasheet - Page 52

• Manufacturer Part Number: mfrc531
• Description: Iso/iec 14443 Reader Ic
• Manufacturer: NXP Semiconductors

NXP Semiconductors
MFRC531_34
Product data sheet
PUBLIC
10.5.1.8 InterruptRq register
Interrupt request flags.
Table 53.
Table 54.
[1]
Bit
Symbol
Access
Bit Symbol
7
6
5
4
3
2
1
0
PrimaryStatus register Bit HiAlertIRq stores this event and it can only be reset using bit SetIRq.
SetIRq
0
TimerIRq
TxIRq
RxIRq
IdleIRq
HiAlertIRq
LoAlertIRq
InterruptRq register (address: 07h) reset value: 0000 0000b, 00h bit allocation
InterruptRq register bit descriptions
SetIRq
W
7
1
1
Value
1
0
-
1
0
0
1
0
1
0
0
1
0
Rev. 3.4 — 26 January 2010
R/W
6
0
Description
sets the marked bits in the InterruptRq register
clears the marked bits in the InterruptRq register
reserved
timer decrements the TimerValue register to zero
timer decrements are still greater than zero
TxIRq is set to logic 1 if one of the following events occurs:
when not acted on by Transceive, Authent1, Authent2, WriteE2 or
CalcCRC commands
reception still ongoing
command terminates correctly. For example; when the Command
register changes its value from any command to the Idle command.
If an unknown command is started the IdleIRq bit is set.
Microprocessor start-up of the Idle command does not set the
IdleIRq bit.
IdleIRq = logic 0 in all other instances
PrimaryStatus register HiAlert bit is set
PrimaryStatus register HiAlert bit is not set
PrimaryStatus register LoAlert bit is not set
the receiver terminates
PrimaryStatus register LoAlert bit is set
TimerIRq
Transceive command; all data transmitted
Authent1 and Authent2 commands; all data transmitted
WriteE2 command; all data is programmed
CalcCRC command; all data is processed
056634
D
5
TxIRq
D
4
RxIRq
D
3
IdleIRq HiAlertIRq LoAlertIRq
D
2
[1]
[1]
ISO/IEC 14443 reader IC
MFRC531
© NXP B.V. 2010. All rights reserved.
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