mfrc531 NXP Semiconductors, mfrc531 Datasheet - Page 26

• Manufacturer Part Number: mfrc531
• Description: Iso/iec 14443 Reader Ic
• Manufacturer: NXP Semiconductors

NXP Semiconductors
MFRC531_34
Product data sheet
PUBLIC
9.6.1 Hard power-down
9.6.2 Soft power-down mode
9.6 Power reduction modes
Hard power-down is enabled when pin RSTPD is HIGH. This turns off all internal current
sinks including the oscillator. All digital input buffers are separated from the input pads and
defined internally (except pin RSTPD itself). The output pins are frozen at a given value.
The status of all pins during a hard power-down is shown in
Table 23.
Soft power-down mode is entered immediately using the Control register bit PowerDown.
All internal current sinks, including the oscillator buffer, are switched off. The digital input
buffers are not separated from the input pads and keep their functionality. In addition, the
digital output pins do not change their state.
After resetting the Control register bit PowerDown, the bit indicating Soft power-down
mode is only cleared after 512 clock cycles. Resetting it does not immediately clear it. The
PowerDown bit is automatically cleared when the Soft power-down mode is exited.
Remark: When the internal oscillator is used, time (t
become stable. This is because the internal oscillator is supplied by V
cycles will not be detected by the internal logic until V
Symbol
OSCIN
IRQ
MFIN
MFOUT
TX1
TX2
NCS
NWR
NRD
D0 to D7
ALE
A0
A1
A2
AUX
RX
VMID
RSTPD
OSCOUT
Signal on pins during Hard power-down
Pin
1
2
3
4
5
7
9
10
11
13 to 20
21
22
23
24
27
29
30
31
32
Rev. 3.4 — 26 January 2010
056634
Type
I
O
I
O
O
O
I
I
I
I/O
I
I/O
I
I
O
I
A
I
O
Description
not separated from input, pulled to AVSS
high-impedance
separated from input
LOW
HIGH, if bit TX1RFEn = logic 1
LOW, if bit TX1RFEn = logic 0
HIGH, only if bit TX2RFEn = logic 1 and bit
TX2Inv = logic 0
otherwise LOW
separated from input
separated from input
separated from input
separated from input
separated from input
separated from input
separated from input
separated from input
high-impedance
not changed
pulled to V
not changed
HIGH
osc
DDA
DDA
) is required for the oscillator to
is stable.
Table
ISO/IEC 14443 reader IC
23.
MFRC531
DDA
© NXP B.V. 2010. All rights reserved.
and any clock
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