mfrc531 NXP Semiconductors, mfrc531 Datasheet - Page 8
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mfrc531
Manufacturer Part Number
mfrc531
Description
Iso/iec 14443 Reader Ic
Manufacturer
NXP Semiconductors
Datasheet
1.MFRC531.pdf
(116 pages)
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NXP Semiconductors
MFRC531_34
Product data sheet
PUBLIC
Fig 3.
Connection to microprocessor: separate read and write strobes
address bus (A3 to An)
address bus (A0 to A2)
data bus (D0 to D7)
HIGH
Read strobe (NRD)
Write strobe (NWR)
9.1.3.1 Separate read and write strobe
9.1.3 Connection to different microprocessor types
The connection to various microprocessor types is shown in
Table 5.
Refer to
MFRC531
pins
ALE
A2
A1
A0
NRD
NWR
NCS
D7 to D0
DECODER
ADDRESS
Section 13.4.1 on page 93
Connection scheme for detecting the parallel interface type
Parallel interface type and signals
Separated read/write strobe Common read/write strobe
Dedicated
address bus
HIGH
A2
A1
A0
NRD
NWR
NCS
D7 to D0
NCS
A0 to A2
D0 to D7
ALE
NRD
NWR
MFRC531
Rev. 3.4 — 26 January 2010
056634
Multiplexed
address
bus
ALE
LOW
HIGH
HIGH
NRD
NWR
NCS
AD7 to AD0 D7 to D0
for timing specification.
non-multiplexed address
LOW
HIGH
HIGH
multiplexed address/data (AD0 to AD7)
address latch enable (ALE)
Read strobe (NRD)
Write strobe (NWR)
Dedicated
address bus
HIGH
A2
A1
A0
NDS
R/NW
NCS
DECODER
ADDRESS
Multiplexed
address bus
AS
LOW
HIGH
LOW
NDS
R/NW
NCS
AD7 to AD0
Table
ISO/IEC 14443 reader IC
5.
NCS
A2
A1
A0
AD0 to AD7
ALE
NRD
NWR
MFRC531
MFRC531
© NXP B.V. 2010. All rights reserved.
Multiplexed
address bus with
handshake
nAStrb
HIGH
HIGH
nWait
nDStrb
nWrite
LOW
AD7 to AD0
001aal220
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