mfrc531 NXP Semiconductors, mfrc531 Datasheet - Page 42

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mfrc531

Manufacturer Part Number
mfrc531
Description
Iso/iec 14443 Reader Ic
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
MFRC531_34
Product data sheet
PUBLIC
10.2 Register bit behavior
Table 35.
Bits and flags for different registers behave differently, depending on their functions. In
principle, bits with same behavior are grouped in common registers.
the function of the Access column in the register tables.
Table 36.
Multiplexed
address bus type
Paging mode
Linear addressing
Abbreviation
R/W
D
R
W
Behavior and designation of register bits
Multiplexed address bus: assembling the register address
Behavior
read and write
dynamic
read only
write only
UsePage
Select
1
0
Rev. 3.4 — 26 January 2010
056634
Register address
PageSelect2 PageSelect1
AD5
Description
These bits can be read and written by the microprocessor.
Since they are only used for control, their content is not
influenced by internal state machines.
Example: TimerReload register may be read and written by
the microprocessor. It will also be read by internal state
machines but never changed by them.
These bits can be read and written by the microprocessor.
Nevertheless, they may also be written automatically by
internal state machines.
Example: the Command register changes its value
automatically after the execution of the command.
These registers hold flags which have a value determined by
internal states only.
Example: the ErrorFlag register cannot be written externally
but shows internal states.
These registers are used for control only. They may be written
by the microprocessor but cannot be read. Reading these
registers returns an undefined value.
Example: The TestAnaSelect register is used to determine the
signal on pin AUX however, it is not possible to read its
content.
AD4
PageSelect0
AD3
ISO/IEC 14443 reader IC
Table 36
MFRC531
© NXP B.V. 2010. All rights reserved.
AD2
AD2
describes
AD1 AD0
AD1 AD0
42 of 116

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