at91cap7e ATMEL Corporation, at91cap7e Datasheet - Page 29

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at91cap7e

Manufacturer Part Number
at91cap7e
Description
Customizable Microcontroller
Manufacturer
ATMEL Corporation
Datasheet

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Part Number:
at91cap7e-NA-ZJ
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9.14
9.15
8549A–CAP–10/08
Chip Identification
PIO Controllers
• Debug Communication Channel Support
• Chip ID: 83770904 (0x1000 0011 0111 0111 0000 1001 0000 0100). This value is stored in
• JTAG ID: unique for each CAP7 personalization.
• Two PIO Controllers (PIOA and PIOB) included.
• Each PIO Controller controls up to 32 programmable I/O Lines
• Fully programmable through Set/Clear Registers
• For each I/O Line (whether assigned to a peripheral or used as general purpose I/O)
• Synchronous output, provides Set and Clear of several I/O lines in a single write
• PIOA has multiplexing of two peripheral functions per I/O Line (see section
• PIOB multiplexing is controlled by the FPGA Interface (see section
the Chip ID Register (DBGU_CIDR) in the Debug Unit. The last 5 bits of the register are
reserved for a chip version number.
Controller A Multiplexing” on page
Multiplexing” on page
– Offers visibility of and interrupt trigger from COMMRX and COMMTX signals from
– PIOA controls 32 I/O Lines (PA0 - PA31)
– PIOB can control up to 32 of the MPIO Lines
– Input change interrupt
– Glitch filter
– Multi-drive option enables driving in open drain
– Programmable pull up on each I/O line
– Pin data status register, supplies visibility of the level on the pin at any time
the ARM Processor’s ICE Interface
47)
36)
11.4.2 ”PIO Controller B
AT91CAP7E
10.4.1 ”PIO
29

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