at91cap7e ATMEL Corporation, at91cap7e Datasheet - Page 467
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at91cap7e
Manufacturer Part Number
at91cap7e
Description
Customizable Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
1.AT91CAP7E.pdf
(520 pages)
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32. Analog-to-digital Converter (ADC)
32.1
32.2
Figure 32-1. Analog-to-Digital Converter Block Diagram
8549A–CAP–10/08
Description
Block Diagram
Analog Inputs
with I/O lines
Multiplexed
The ADC is based on a Successive Approximation Register (SAR) 10-bit Analog-to-Digital Con-
verter (ADC). It also integrates an 8-to-1 analog multiplexer, making possible the analog-to-
digital conversions of
On the AT91CAP7E device, the analog inputs are AD0 - AD7.
The ADC supports an 8-bit or 10-bit resolution mode, and conversion results are reported in a
common register for all channels, as well as in a channel-dedicated register. Software trigger,
external trigger on rising edge of the ADTRG pin or internal triggers from Timer Counter out-
put(s) are configurable.
The ADC also integrates a Sleep Mode and a conversion sequencer and connects with a PDC
channel. These features reduce both power consumption and processor intervention.
Finally, the user can configure ADC timings, such as Startup Time and Sample & Hold Time.
ADTRG
ADVREF
AVDD
AGND
AD0
AD1
AD7
MPIO
8
analog lines. The conversions extend from 0V to ADVREF.
Selection
Channels
Trigger
Counter
Timer
Analog-to-Digital
Approximation
Successive
Converter
Register
ADC
Interface
Control
Logic
User
ADC Interrupt
PDC
AIC
Peripheral Bridge
ASB
APB
AT91CAP7E
467
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