at91cap7e ATMEL Corporation, at91cap7e Datasheet - Page 332

• Manufacturer Part Number: at91cap7e
• Description: Customizable Microcontroller
• Manufacturer: ATMEL Corporation

• PCS: Peripheral Chip Select
This field is only used if Fixed Peripheral Select is active (PS = 0).
If PCSDEC = 0:
If PCSDEC = 1:
• DLYBCS: Delay Between Chip Selects
This field defines the delay from NPCS inactive to the activation of another NPCS. The DLYBCS time guarantees non-over-
lapping chip selects and solves bus contentions in case of peripherals having long data float times.
If DLYBCS is less than or equal to six, six MCK periods (or 6*N MCK periods if FDIV is set) will be inserted by default.
Otherwise, the following equation determines the delay:
If FDIV is 0:
If FDIV is 1:
28.7.3
Name:
Access Type:
332
PCS = xxx0
PCS = xx01
PCS = x011
PCS = 0111
PCS = 1111
(x = don’t care)
NPCS[3:0] output signals = PCS.
31
23
15
–
–
7
AT91CAP7E
SPI Receive Data Register
30
22
14
–
–
6
Delay Between Chip Selects
Delay Between Chip Selects
Delay Between Chip Selects
29
21
13
–
–
5
NPCS[3:0] = 1110
NPCS[3:0] = 1101
NPCS[3:0] = 1011
NPCS[3:0] = 0111
forbidden (no peripheral is selected)
SPI_RDR
Read-only
28
20
12
=
=
=
–
–
4
DLYBCS
--------------------------------- -
DLYBCS
---------------------- -
DLYBCS
---------------------- -
MCK
MCK
MCK
RD
RD
×
N
27
19
11
–
3
26
18
10
–
2
PCS
25
17
–
9
1
8549A–CAP–10/08
24
16
–
8
0