p87lpc778 NXP Semiconductors, p87lpc778 Datasheet - Page 19

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p87lpc778

Manufacturer Part Number
p87lpc778
Description
Cmos Single-chip 8-bit 80c51 Microcontroller 128-byte Data Ram, 8 Kb Otp
Manufacturer
NXP Semiconductors
Datasheet

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8.5.2 Internal reference voltage
8.5.3 Comparator interrupt
8.5.4 Comparators and power reduction modes
An internal reference voltage generator may supply a default reference when a single
comparator input pin is used. The value of the internal reference voltage, referred to
as Vref, is 1.28 V 10 %.
Each comparator has an interrupt flag CMFn contained in its configuration register.
This flag is set whenever the comparator output changes state. The flag may be
polled by software or may be used to generate an interrupt. The interrupt will be
generated when the corresponding enable bit ECn in the IEN1 register is set and the
interrupt system is enabled via the EA bit in the IEN0 register.
Either or both comparators may remain enabled when Power-down or Idle mode is
activated. The comparators will continue to function in the power reduction mode. If a
comparator interrupt is enabled, a change of the comparator output state will
generate an interrupt and wake up the processor. If the comparator output to a pin is
enabled, the pin should be configured in the push-pull mode in order to obtain fast
switching times while in Power-down mode. The reason is that with the oscillator
stopped, the temporary strong pull-up that normally occurs during switching on a
quasi-bidirectional port pin does not take place.
Comparators consume power in Power-down and Idle modes, as well as in the
normal operating mode. This fact should be taken into account when system power
consumption is an issue.
a.
c.
e.
g.
Fig 7. Comparator configurations.
CPn, CNn, OEn = 0 0 0
CPn, CNn, OEn = 0 1 0
CPn, CNn, OEn = 1 0 0
CPn, CNn, OEn = 1 1 0
V REF (1.23V)
V REF (1.23V)
CMPREF
CMPREF
CINnB
CINnA
CINnA
CINnB
Rev. 01 — 31 March 2004
002aaa623
002aaa618
002aaa621
002aaa625
COn
COn
COn
COn
CMOS single-chip 8-bit microcontroller
b.
d.
f.
h.
CPn, CNn, OEn = 0 0 1
CPn, CNn, OEn = 0 1 1
CPn, CNn, OEn = 1 0 1
CPn, CNn, OEn = 1 1 1
V REF (1.23 V)
V REF (1.23 V)
CMPREF
CMPREF
CINnA
CINnB
CINnA
CINnB
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
P87LPC778
002aaa620
002aaa624
002aaa622
002aaa626
COn
COn
COn
COn
CMPn
CMPn
CMPn
CMPn
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