p87lpc778 NXP Semiconductors, p87lpc778 Datasheet - Page 67

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p87lpc778

Manufacturer Part Number
p87lpc778
Description
Cmos Single-chip 8-bit 80c51 Microcontroller 128-byte Data Ram, 8 Kb Otp
Manufacturer
NXP Semiconductors
Datasheet

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8.18.1 System configuration bytes
A special user data area is also available for access via the MOVC instruction at
addresses FCE0h through FCFFh. This ‘customer code’ space is programmed in the
same manner as the main code EPROM and may be used to store a serial number,
manufacturing date, or other application information.
A number of user configurable features of the P87LPC778 must be defined at power
up and therefore cannot be set by the program after start of execution. Those
features are configured through the use of two EPROM bytes that are programmed in
the same manner as the EPROM program space. The contents of the two
configuration bytes, UCFG1 and UCFG2, are shown in Tables 60, 61,
values of these bytes may be read by the program through the use of the MOVX
instruction at the addresses shown in the tables.
Table 60:
Unprogrammed value: FFH
Table 61:
Table 62:
Bit
7
6
5
4
3
2 to 0
FOSC[2:0]
1 1 1
0 1 1
Bit
Symbol
Symbol
WDTE
RPD
PRHI
BOV
CLKR
FOSC[2:0]
UCFG1 - EPROM system configuration byte 1 register (address FD00H) bit
allocation
UCFG1 - EPROM system configuration byte 1 register (address FD00H) bit
description
FOSC2-FOSC0 oscillator configuration
WDTE
7
Rev. 01 — 31 March 2004
RPD
6
Description
Watchdog timer enable. When programmed (0), disables the
Watchdog timer. The timer may still be used to generate an
interrupt.
Reset pin disable. When programmed (0), disables the reset
function of pin P1.5, allowing it to be used as an input only port
pin.
Port reset high. When ‘1’, ports reset to a high state. When ‘0’,
ports reset to a low state.
Brownout voltage select. When ‘1’, the brownout detect voltage is
2.5 V. When ‘0’, the brownout detect voltage is 3.8 V. This is
described in
42.
Clock rate select. When ‘0’, the CPU clock rate is divided by 2.
This results in machine cycles taking 12 CPU clocks to complete
as in the standard 80C51. For full backward compatibility, this
division applies to peripheral timing as well.
CPU oscillator type select. See
39
shown below should not be used. They are reserved for future
use.
Oscillator configuration
External clock input on X1 (default setting for an unprogrammed
part).
Internal RC oscillator, 6 MHz.
for additional information. Combinations other than those
PRHI
5
Section 8.11 “Power monitoring functions” on page
BOV
4
CMOS single-chip 8-bit microcontroller
CLKR
3
Section 8.10 “Oscillator” on page
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
FOSC2
P87LPC778
2
FOSC1
63
1
and 64. The
FOSC0
67 of 79
0

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