p87lpc778 NXP Semiconductors, p87lpc778 Datasheet - Page 46

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p87lpc778

Manufacturer Part Number
p87lpc778
Description
Cmos Single-chip 8-bit 80c51 Microcontroller 128-byte Data Ram, 8 Kb Otp
Manufacturer
NXP Semiconductors
Datasheet

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8.14 Timer/counters
The P87LPC778 has two general purpose counter/timers which are upward
compatible with the standard 80C51 Timer0 and Timer1. Both can be configured to
operate either as timers or event counters (see Tables
automatically toggle the T0 and/or T1 pins upon timer overflow has been added.
In the ‘Timer’ function, the register is incremented every machine cycle. Thus, one
can think of it as counting machine cycles. Since a machine cycle consists of 6 CPU
clock periods, the count rate is
“Enhanced CPU” on page 12
In the ‘Counter’ function, the register is incremented in response to a 1-to-0 transition
at its corresponding external input pin, T0 or T1. In this function, the external input is
sampled once during every machine cycle. When the samples of the pin state show a
high in one cycle and a low in the next cycle, the count is incremented. The new count
value appears in the register during the cycle following the one in which the transition
was detected. Since it takes 2 machine cycles (12 CPU clocks) to recognize a 1-to-0
transition, the maximum count rate is
restrictions on the duty cycle of the external input signal, but to ensure that a given
level is sampled at least once before it changes, it should be held for at least one full
machine cycle.
The ‘Timer’ or ‘Counter’ function is selected by control bits C/T in the Special
Function Register TMOD. In addition to the ‘Timer’ or ‘Counter’ selection, Timer0 and
Timer1 have four operating modes, which are selected by bit-pairs (M1, M0) in
TMOD. Modes 0, 1, and 2 are the same for both Timers/Counters. Mode 3 is different.
The four operating modes are described in the following text.
Fig 18. Block diagram showing reset sources.
SOFTWARE RESET
POWER MONITOR
WDTE (UCFG1.7)
(AUXR1.3)
RPD (UCFG1.6)
MODULE
RESET
RST / V PP pin
SRST
WDT
Rev. 01 — 31 March 2004
for a description of the CPU clock.
1
6
of the CPU clock frequency. Refer to
1
6
of the CPU clock frequency. There are no
CMOS single-chip 8-bit microcontroller
clock
CPU
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
43
TIMING
RESET
and 44). An option to
S
R
P87LPC778
Q
002aaa636
Section 8.1
chip reset
46 of 79

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