mc9s08qg8 Freescale Semiconductor, Inc, mc9s08qg8 Datasheet - Page 137
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mc9s08qg8
Manufacturer Part Number
mc9s08qg8
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S08QG8.pdf
(300 pages)
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For proper conversion, the input voltage must fall between V
exceeds V
(full scale 8-bit representation). If the input is equal to or less than V
to $000. Input voltages between V
brief current associated with V
3.5 cycles of the ADCK source when ADLSMP is low, or 23.5 cycles when ADLSMP is high.
For minimal loss of accuracy due to current injection, pins adjacent to the analog input pins should not be
transitioning during conversions.
9.6.2
Several sources of error exist for A/D conversions. These are discussed in the following sections.
9.6.2.1
For proper conversions, the input must be sampled long enough to achieve the proper accuracy. Given the
maximum input resistance of approximately 7kΩ and input capacitance of approximately 5.5 pF, sampling
to within 1/4
8 MHz maximum ADCK frequency) provided the resistance of the external analog source (R
below 5 kΩ.
Higher source resistances or higher-accuracy sampling is possible by setting ADLSMP (to increase the
sample window to 23.5 cycles) or decreasing ADCK frequency to increase sample time.
9.6.2.2
Leakage on the I/O pins can cause conversion error if the external analog source resistance (R
If this error cannot be tolerated by the application, keep R
1/4
9.6.2.3
System noise which occurs during the sample or conversion process can affect the accuracy of the
conversion. The ADC accuracy numbers are guaranteed as specified only if the following conditions are
met:
Freescale Semiconductor
LSB
•
•
•
•
•
leakage error (N = 8 in 8-bit mode or 10 in 10-bit mode).
There is a 0.1 µF low-ESR capacitor from V
There is a 0.1 µF low-ESR capacitor from V
If inductive isolation is used from the primary supply, an additional 1 µF capacitor is placed from
V
V
Operate the MCU in wait or stop3 mode before initiating (hardware triggered conversions) or
immediately after initiating (hardware or software triggered conversions) the ADC conversion.
— For software triggered conversions, immediately follow the write to the ADCSC1 with a WAIT
DDAD
SSAD
REFH
instruction or STOP instruction.
Sources of Error
LSB
Sampling Error
Pin Leakage Error
Noise-Induced Errors
(and V
, the converter circuit converts the signal to $3FF (full scale 10-bit representation) or $FF
to V
(at 10-bit resolution) can be achieved within the minimum sample window (3.5 cycles @
SSAD
REFL
.
, if connected) is connected to V
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 1.01
REFL
REFH
when the sampling capacitor is charging. The input is sampled for
and V
REFL
are straight-line linear conversions. There will be a
REFH
DDAD
AS
to V
to V
SS
lower than V
REFH
at a quiet point in the ground plane.
REFL
SSAD
and V
.
REFL
.
Analog-to-Digital Converter (S08ADC10V1)
REFL
DDAD
, the converter circuit converts it
. If the input is equal to or
/ (2
N
*I
LEAK
) for less than
AS
AS
) is kept
) is high.
137