mc9s08qg8 Freescale Semiconductor, Inc, mc9s08qg8 Datasheet - Page 184
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mc9s08qg8
Manufacturer Part Number
mc9s08qg8
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S08QG8.pdf
(300 pages)
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Modulo Timer (S08MTIMV1)
13.1.4
The block diagram for the modulo timer module is shown
13.2
The MTIM includes one external signal, TCLK, used to input an external clock when selected as the
MTIM clock source. The signal properties of TCLK are shown in
The TCLK input must be synchronized by the bus clock. Also, variations in duty cycle and clock jitter must
be accommodated. Therefore, the TCLK signal must be limited to one-fourth of the bus frequency.
The TCLK pin can be muxed with a general-purpose port pin. See the
the pin location and priority of this function.
13.3
Each MTIM includes four registers:
Refer to the direct-page register summary in the
assignments for all MTIM registers. This section refers to registers and control bits only by their names
and relative address offsets.
Some MCUs may have more than one MTIM, so register names include placeholder characters to identify
which MTIM is being referenced.
184
BUSCLK
XCLK
TCLK
•
•
•
•
MTIM
INTERRUPT
REQUEST
An 8-bit status and control register
An 8-bit clock configuration register
An 8-bit counter register
An 8-bit modulo register
External Signal Description
Register Definition
Block Diagram
SYNC
TOF
TOIE
Figure 13-2. Modulo Timer (MTIM) Block Diagram
Signal
TCLK
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 1.01
SOURCE
SELECT
CLOCK
CLKS
Table 13-1. Signal Properties
External clock source input into MTIM
PRESCALE AND
SELECT DIVIDE
Memory
BY
PS
Function
chapter of this data sheet for the absolute address
Figure
13-2.
Table
Pins and Connections
13-1.
8-BIT COMPARATOR
8-BIT MODULO
8-BIT COUNTER
(MTIMMOD)
(MTIMCNT)
I/O
I
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