mc9s08qg8 Freescale Semiconductor, Inc, mc9s08qg8 Datasheet - Page 252

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mc9s08qg8

Manufacturer Part Number
mc9s08qg8
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Development Support
17.4
This section contains the descriptions of the BDC and DBG registers and control bits.
Refer to the high-page register summary in the device overview chapter of this data sheet for the absolute
address assignments for all DBG registers. This section refers to registers and control bits only by their
names. A Freescale-provided equate or header file is used to translate these names into the appropriate
absolute addresses.
17.4.1
The BDC has two registers:
These registers are accessed with dedicated serial BDC commands and are not located in the memory
space of the target MCU (so they do not have addresses and cannot be accessed by user programs).
Some of the bits in the BDCSCR have write limitations; otherwise, these registers may be read or written
at any time. For example, the ENBDM control bit may not be written while the MCU is in active
background mode. (This prevents the ambiguous condition of the control bit forbidding active background
mode while the MCU is already in active background mode.) Also, the four status bits (BDMACT, WS,
WSF, and DVF) are read-only status indicators and can never be written by the WRITE_CONTROL serial
BDC command. The clock switch (CLKSW) control bit may be read or written at any time.
252
The BDC status and control register (BDCSCR) is an 8-bit register containing control and status
bits for the background debug controller.
The BDC breakpoint match register (BDCBKPT) holds a 16-bit breakpoint match address.
Registers and Control Bits
BDC Registers and Control Bits
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 1.01
Freescale Semiconductor

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