mc9s08qg8 Freescale Semiconductor, Inc, mc9s08qg8 Datasheet - Page 26
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mc9s08qg8
Manufacturer Part Number
mc9s08qg8
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S08QG8.pdf
(300 pages)
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Chapter 2 External Signal Description
Typically, application systems have two separate capacitors across the power pins: a bulk electrolytic
capacitor, such as a 10-µF tantalum capacitor, to provide bulk charge storage for the overall system, and a
bypass capacitor, such as a 0.1-µF ceramic capacitor, located as near to the MCU power pins as practical
to suppress high-frequency noise.
2.2.2
Out of reset, the MCU uses an internally generated clock provided by the internal clock source (ICS)
module. The internal frequency is nominally 16-MHz and the default ICS settings will provide for a
4-MHz bus out of reset. For more information on the ICS, see
(S08ICSV1).”
The oscillator module (XOSC) in this MCU is a Pierce oscillator that can accommodate a crystal or
ceramic resonator in either of two frequency ranges selected by the RANGE bit in ICSC2. Rather than a
crystal or ceramic resonator, an external clock source can be connected to the EXTAL input pin.
Refer to
resistors such as carbon composition resistors. Wire-wound resistors, and some metal film resistors, have
too much inductance. C1 and C2 normally should be high-quality ceramic capacitors that are specifically
designed for high-frequency applications.
R
value is not generally critical. Typical systems use 1 MΩ to 10 MΩ. Higher values are sensitive to humidity
and lower values reduce gain and (in extreme cases) could prevent startup.
C1 and C2 are typically in the 5-pF to 25-pF range and are chosen to match the requirements of a specific
crystal or resonator. Be sure to take into account printed circuit board (PCB) capacitance and MCU pin
capacitance when sizing C1 and C2. The crystal manufacturer typically specifies a load capacitance which
is the series combination of C1 and C2, which are usually the same size. As a first-order approximation,
use 10 pF as an estimate of combined pin and PCB capacitance for each oscillator pin (EXTAL and
XTAL).
2.2.3
After a power-on reset (POR), the PTA5/IRQ/TCLK/RESET pin defaults to a general-purpose input port
pin, PTA5. Setting RSTPE in SOPT1 configures the pin to be the RESET input pin. After configured as
RESET, the pin will remain RESET until the next POR. The RESET pin can be used to reset the MCU
from an external source when the pin is driven low. When enabled as the RESET pin (RSTPE = 1), an
internal pullup device is automatically enabled.
26
F
is used to provide a bias path to keep the EXTAL input in its linear range during crystal startup and its
Figure 2-3
Oscillator (XOSC)
Reset (Input Only)
This pin does not contain a clamp diode to V
above V
The voltage measured on the internally pulled up RESET pin will not be
pulled to V
The RESET pullup should not be used to pullup components external to the
MCU.
for the following discussion. R
DD
.
DD
. The internal gates connected to this pin are pulled to V
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 1.01
NOTE
S
(when used) and R
DD
Chapter 10, “Internal Clock Source
and should not be driven
F
should be low-inductance
Freescale Semiconductor
DD
.