ia186es Innovasic Semiconductor Inc., ia186es Datasheet - Page 34

• Manufacturer Part Number: ia186es
• Description: 8-bit/16-bit Microcontrollers
• Manufacturer: Innovasic Semiconductor Inc.

IA186ES/IA188ES
8-Bit/16-Bit Microcontrollers
The enrx0_n is the Enable-Receiver-Request for asynchronous serial port 0 when Bit [4]
(ENRX0) in the AUXCON register is 1, and Bit [9] (FC) in the SP0CT register is 1, and it
enables the asynchronous serial port receiver.
2.2.11 den_n/ds_n/pio5—Data Enable /Data Strobe (both are synchronous outputs with
den_n is asserted during I/O, memory, and interrupt acknowledge processes and is deasserted
when dt/r_n undergoes a change of state. It is tristated for a bus hold or reset. After reset, this
pin defaults to den_n.
The data strobe ds_n is used under conditions in which a write cycle has the same timing as a
read cycle. It is used with other control signals to interface with 68-Kbyte-type peripherals
without further system interface logic. When it is asserted, addresses are valid. During a write,
the data is valid, while during a read, data may be applied to the ad bus.
2.2.12 drq0/int5/pio12—DMA Request 0 (synchronous level-sensitive input)/Maskable
The drq0 is an external device that is ready for DMA channel 0 to carry out a transfer. It
indicates to the microcontroller this readiness on this pin. It is not latched and must remain
asserted until it is dealt with.
If DMA channel 0 is not required, int5 may be used as an extra interrupt request sharing the
DMA0 interrupt type (0ah) and control bits. It is not latched and must remain asserted until it is
dealt with.
2.2.13 drq1/int6/pio13—DMA Request 1 (synchronous level-sensitive input)/Maskable
The drq1 is an external device that is ready for DMA channel 1 to carry out a transfer. It
indicates to the microcontroller this readiness on this pin. It is not latched and must remain
asserted until it is dealt with.
If DMA channel 1 is not required, int6 may be used as an extra interrupt request sharing the
DMA1 interrupt type (0bh) and control bits. It is not latched and must remain asserted until it is
dealt with.
2.2.14 dt/r_n/pio4—Data Transmit or Receive (synchronous output with tristate)
The microntroller transmits data when dt/r_n is pulled high and receives data when this pin is
pulled low. It floats during a reset or bus hold condition.
tristate)
Interrupt Request 5 (asynchronous edge-triggered input)
Interrupt Request 6 (asynchronous edge-triggered input)
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Page 34 of 154
IA211050902-15
December 24, 2008
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