ia186es Innovasic Semiconductor Inc., ia186es Datasheet - Page 85

• Manufacturer Part Number: ia186es
• Description: 8-bit/16-bit Microcontrollers
• Manufacturer: Innovasic Semiconductor Inc.

IA186ES/IA188ES
8-Bit/16-Bit Microcontrollers
Note: See the definitions of long and short break in the Serial Port Status
register definition.
DMA Control Bits
– DMA transfers to both serial ports are destination-synchronized operations. When the
– DMA transfers from both serial ports are source-synchronized operations. When the
– DMA transfers do not preclude the use of hardware handshaking.
– If either or both serial ports are configured for DMA transfers, the DMA request is
Bit [12]—RSIE Receive Status Interrupt Enable → When an exception occurs during
data reception, an interrupt request is generated if enabled by this bit (RSIE = 1).
Interrupt requests are made for the error conditions listed (BRK0, BRK1, OER, PER, and
FER) in the serial port status register.
Bit [11]—BRK Send Break → When this bit is set to 1, the txd pin is driven low
overriding any data that may be in the course of being shifted out of the transmit shift
register.
DMA Bits
000b
001b
010b
011b
100b
101b
110b
111b
transmit holding register is empty, a new transfer is requested, corresponding with the
assertion of the THRE bit in the status register in non-DMA mode. However, when
configured for DMA transfers, the respective transmit interrupt is disabled without
regard for the TXIE bit.
receive holding register contains valid data, a new transfer is requested,
corresponding with the assertion of the RDR bit in the status register in non-DMA
mode. However, when configured for DMA receives, the respective receive interrupt
is disabled without regard for the RXIE bit. This is despite the fact that the RSIE bit
may still permit receive status interrupts, depending on its setting.
internally generated and the corresponding external DMA signals, drq0 and/or drq1
do not play a role.
No DMA
DMA0
DMA1
Reserved
DMA0
DMA1
No DMA
No DMA
Receive
®
No DMA
DMA1
DMA0
Reserved
No DMA
No DMA
DMA0
DMA1
Transmit
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Page 85 of 154
IA211050902-15
December 24, 2008
http://www.Innovasic.com
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