ia186es Innovasic Semiconductor Inc., ia186es Datasheet - Page 68

• Manufacturer Part Number: ia186es
• Description: 8-bit/16-bit Microcontrollers
• Manufacturer: Innovasic Semiconductor Inc.

IA186ES/IA188ES
8-Bit/16-Bit Microcontrollers
5.1.7
The Enable Dynamic RAM Refresh Control Register provides control and status for the refresh
counter. The EDRAM register contains 0000h at reset (see Table 23).
Table 23. Enable Dynamic RAM Refresh Control Register
15
EN
14
0
Bits [10–8]—Reserved.
Bits [7–0]—COUNT → Control the timeout period for the WDT as follows:
Bit [15]—EN → When set to 1, the refresh counter is enabled and msc3_n is configured
to act as rfsh_n. Clearing EN clears the refresh counter and disables refresh requests.
The refresh address is unaffected by clearing EN.
Bits [14–9]—Reserved → These bits read back as 0.
Bits [8–0]—T [8–0] → These bits hold the current value of the refresh counter. These
bits are read-only.
Where:
EDRAM (0e4h)
T
frequency = The processor frequency in hertz.
exponent
13
0
Bit [7]
timeout
X
X
X
X
X
X
X
0
1
12
0
Bit [6]
11
0
®
X
X
X
X
X
X
0
1
0
= The WDT timeout period in seconds.
= Is based upon count as shown below:
10
0
Bit [5]
X
X
X
X
X
0
1
0
0
9
0
8
Bit [4]
T
7
timeout
X
X
X
X
0
1
0
0
0
UNCONTROLLED WHEN PRINTED OR COPIED
6
= 2
Bit [3]
5
X
X
X
T [8–0]
0
1
0
0
0
0
exponent
Page 68 of 154
IA211050902-15
4
Bit [2]
3
/frequency
X
X
0
1
0
0
0
0
0
2
1
Bit [1]
X
0
1
0
0
0
0
0
0
0
Bit [0]
0
1
0
0
0
0
0
0
0
Exponent
NA
10
20
21
22
23
24
25
26
December 24, 2008
http://www.Innovasic.com
Customer Support:
(Equation 1)
Data Sheet
1-888-824-4184