mt9075bpr1 Zarlink Semiconductor, mt9075bpr1 Datasheet - Page 13

• Manufacturer Part Number: mt9075bpr1
• Description: E1 Single Chip Transceiver With Liu
• Manufacturer: Zarlink Semiconductor

Depending on the mode selected, the Jitter Attenuator (JA) can attenuate either transmit clock jitter or receive
clock jitter, or be disconnected. Control bits JAS, JAT/JAR (address 18H of page 02H) determine the JA
selection under certain modes. Table 2 shows the configuration of related control pins and control bits required
to place the MT9075B in the appropriate jitter attenuation mode.
Referring to the mode names given in Table 2, the basic operation of the jitter attenuation modes is summarized
as follows:
•
•
In SysBusSync (1-3) modes, pins C4b and F0b are always configured as inputs, while in the Line
Synchronous and Free-Run modes C4b and F0b are configured as outputs.
In SysBusSync1 mode, an external clock is applied to C4b. The applied clock is dejittered by the internal
PLL before being used to transmit data. The clock extracted (with no jitter attenuation performed) from the
receive data can be monitored on pin E2o.
SysBusSync1
SysBusSync2
SysBusSync3
Synchronous
Mode Name
Free-Run
Line
-19.5
0.5
dB
0
10
BS/LS
1
1
1
0
x
Table 2 - Selection of Clock Jitter Attenuation Modes
BL/FR
Figure 8 - Typical Jitter Attenuation Curve
1
1
1
1
0
Zarlink Semiconductor Inc.
JAS
1
1
0
x
x
MT9075B
Frequency (Hz)
13
40
JAT/JAR
1
0
x
x
x
400
JA on Tx side; No JA on Rx side
JA on Rx side; No JA on Tx side
No JA on Tx or Rx side
By default, JA is on the receive side.
Controls bits need not be selected.
In free-run mode JA will be automatically
disconnected
-20 dB/decade
Note
10K
Data Sheet