mt9075bpr1 Zarlink Semiconductor, mt9075bpr1 Datasheet - Page 64

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mt9075bpr1

Manufacturer Part Number
mt9075bpr1
Description
E1 Single Chip Transceiver With Liu
Manufacturer
Zarlink Semiconductor
Datasheet

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Part Number:
MT9075BPR1
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7 - 0
7 - 0
Bit
Bit
Bit
7
6
5
4
3
2
1
0
PRBSO
FEBEO
BERO
Name
Name
BPVO
EC7-0
JFC7
JFC0
Name
CCO
LBO
EFO
JFO
-
Jitter FIFO Counter. This is an 8 bit counter that is incremented when the
FIFO read pointer comes within 4 words of an underflow or overflow
condition. During this time the read clock will abruptly slow-down or speed-
up to avoid an overflow or underflow condition.
PRBS Error Counter Overflow. This bit is set to one when the PRBS Error
Counter (page 04H address 10H) overflows. It is cleared when this register
is read.
E Bit Counter Overflow. This bit is set to one when the E bit Counter (page
04H, address 13H & 14H) overflows. It is cleared when this register is read.
Jitter Attenuator FIFO Counter Overflow. This bit is set to one when the
Jitter Attenuator FIFO Counter (page 04H, address 15H) overflows. It is
cleared when this register is read.
Lost of Basic Frame Synchronization Counter Overflow. This bit is set
to one when the Loss of Basic Frame Synchronization Counter (page 04H
address 17H) overflows. It is cleared when this register is read.
Bit Error Rate Counter Overflow. This bit is set to one when the Bit Error
Rate Counter (page 04H, address 18H) overflows. It is cleared when this
register is read.
Errored Frame Alignment Signal Counter Overflow. This bit is set to one
when the Errored Frame Alignment Signal Counter (page 04H, address
1AH) overflows. It is cleared when this register is read.
Bipolar Violation Counter Overflow. This bit is set high when the Bipolar
Violation Counter (page 04H, address 1CH & 1DH) overflows. It is cleared
when this register is read.
CRC Error Counter Overflow. This bit is set high when the CRC Error
Counter (page 04H, address 1EH & 1FH) overflows. It is cleared when this
register is read.
Table 56 - Overflow Reporting Latch
E bit Error Counter. The least significant eight bits of the E-bit error
counter.
Table 55 - Jitter FIFO Counter
Table 54 - E bit Error Counter
(Page 04H, Address 14H)
(Page 04H, Address 15H)
(Page 04H, Address 16H)
Zarlink Semiconductor Inc.
MT9075B
64
Functional Description
Functional Description
Functional Description
Data Sheet

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