mt9075bpr1 Zarlink Semiconductor, mt9075bpr1 Datasheet - Page 59

• Manufacturer Part Number: mt9075bpr1
• Description: E1 Single Chip Transceiver With Liu
• Manufacturer: Zarlink Semiconductor

7 - 4
1 - 0
Bit
3-0
Bit
7
6
5
4
3
2
RSLPD
RxEBC
RMA1-4
RSLIP
Name
AUXP
CEFS
X2, X3
Name
11-8
X1
Y
Table 41 - Receive Multiframe Alignment Signal
Table 42 - Most Significant Phase Status Word
Receive Slip. A change of state (i.e., 1-to-0 or 0-to-1) indicates that a
receive controlled frame slip has occurred.
Receive Slip Direction. If one, indicates that the last received frame slip
resulted in a repeated frame, i.e., system clock is faster than network
clock. If zero, indicates that the last received frame slip resulted in a lost
frame, i.e., system clock is slower than network clock. Updated on an
RSLIP occurrence basis.
Auxiliary Pattern. This bit will go high when a continuous 101010... bit
stream (Auxiliary Pattern) is received on the PCM 30 link for a period of at
least 512 bits. If zero, auxiliary pattern is not being received. This pattern
will be decoded in the presence of a bit error rate of as much as 10
Consecutively Errored Frame Alignment Signal. This bit goes high
when the last two frame alignment signals were received in error. This bit
will be low when at least one of the last two frame alignment signals is
without error.
Receive Eighth Bit Count. The four most significant bit of a counter that
indicates the number of one eighth bit times there are between the ST-
BUS frame pulse and receive frame pulse (RxFP).
Receive Multiframe Alignment Bits One to Four. These bits are
received on the PCM 30 2048 kbit/sec. link in bit positions one to four of
time slot 16 of frame zero of every signalling multiframe. These bit should
be 0000 for proper signalling multiframe alignment.
Receive Spare Bit X1. This bit is received on the PCM 30 2048 kbit/sec.
link in bit position five of time slot 16 of frame zero of every signalling
multiframe.
Receive Y-bit. This bit is received on the PCM 30 2048 kbit/sec. link in
bit position six of time slot 16 of frame zero of every signalling multiframe.
The Y bit may indicate loss of multiframe alignment at the remote end (1 -
loss of multiframe alignment; 0 - multiframe alignment acquired).
Receive Spare Bits X2 and X3. These bits are received on the PCM 30
2048 kbit/sec. link in bit positions seven and eight respectively, of time
slot 16 of frame zero of every signalling multiframe.
(Page 03H, Address 14H)
(Page 03H, Address 15H)
Zarlink Semiconductor Inc.
MT9075B
59
Functional Description
Functional Description
Data Sheet
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