mt9075bpr1 Zarlink Semiconductor, mt9075bpr1 Datasheet - Page 40

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mt9075bpr1

Manufacturer Part Number
mt9075bpr1
Description
E1 Single Chip Transceiver With Liu
Manufacturer
Zarlink Semiconductor
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT9075BPR1
Manufacturer:
TI
Quantity:
5
1 - 0
7 -4
Bit
4-0
3
2
Bit
7
6
5
TMA1-4
RxTRSP
X2, X3
Name
HDLC0
HDLC1
Name
(11)
(0)
X1
(1)
(1)
Y
(0)
(0)
(0)
---
Transmit Multiframe Alignment Bits One to Four. These bits are
transmitted on the PCM 30 2048 kbit/sec. link in bit positions one to four
of time slot 16 of frame zero of every signalling multiframe. These bits
are used by the far end to identify specific frames of a signalling
multiframe. TMA1-4 = 0000 for normal operation.
This bit is transmitted on the PCM 30 2048 kbit/sec. link in bit position
five of time slot 16 of frame zero of every multiframe. X1 is normally set
to one.
This bit is transmitted on the PCM 30 2048 kbit/sec. link in bit position six
of time slot 16 of frame zero of every multiframe. It is used to indicate the
loss of multiframe alignment to the remote end of the link. If one - loss of
multiframe alignment; if zero - multiframe alignment acquired. This bit is
ignored when AUTY is zero (page 01H, address 11H).
These bits are transmitted on the PCM 30 2048 kbit/sec. link in bit
positions seven and eight respectively, of time slot 16 of frame zero of
every multiframe. X2 and X3 are normally set to one.
HDLC0 Select. If one, then HDLC0 is connected to the data link on
selected S
is deselected and all HDLC0 interrupts are masked.
HDLC1 Select. If one, then HDLC1 is connected to time slot 16 in CCS
mode. If zero, HDLC1 is deselected and all HDLC1 interrupts are
masked.
Receive Transparent Mode. When this bit is set to one, the framing
function is disabled on the receive side. Data coming from the receive
line passes through the slip buffer and drives DSTo with an arbitrary
alignment. When zero, the receive framing function operates normally.
Unused.
Table 16 - Transmit MF Alignment Signal
Table 17 - HDLC Selection Word
a
bits at a rate of 4, 8, 12, 16 or 20 kbits/sec. If zero, HDLC0
(Page 01H, Address 13H)
(Page 01H, Address 14H)
Zarlink Semiconductor Inc.
MT9075B
Functional Description
40
Functional Description
Data Sheet

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