mt9075bpr1 Zarlink Semiconductor, mt9075bpr1 Datasheet - Page 38

• Manufacturer Part Number: mt9075bpr1
• Description: E1 Single Chip Transceiver With Liu
• Manufacturer: Zarlink Semiconductor

4 - 0 S
Bit
Bit
Table 13 - Multiframe National Bit Buffer and DL Selection Word (Page 01H, Address 10H)
7
6
5
4
3
7
6
5
(00000)
MFSEL
CRCM
Name
AUTY
Name
ASEL
NBTB
a4
ARAI
TIU0
RST
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
- S
a8
Transmit International Use Zero. When CRC-4 operation is disabled (CSYN=1),
this bit is transmit on the PCM 30 2048 kbit/sec. link in bit position one of time-slot
zero of frame-alignment frames. It is reserved for international use and should
normally be kept at one. If CRC processing is used, i.e., CSYN =0, this bit is ignored.
CRC-4 Modification. If one, activates the CRC-4 remainder modification function
when the device is in transparent mode. The received CRC-4 remainder is modified
to reflect only the changes in the transmit DL. If zero, time slot zero data from DSTi
will not be modified in transparent mode.
Reset. When this bit is changed from zero to one the device will reset to its default
mode. See the Reset Operation section for the default settings.
Automatic RAI Operation. If zero, the Remote Alarm Indication bit (the A bit) will
function automatically. That is, RAI=0 when basic synchronization has been
acquired and RAI=1 when basic synchronization has not been acquired. If one,
the remote alarm indication bit is controlled through the TALM bit of the transmit
Non-Frame Alignment Control Word.
Automatic Y-Bit Operation. If zero, the Y-bit of the transmit multiframe alignment
signal will report the multiframe alignment status to the far end i.e., zero - multiframe
alignment acquired, one - lost. If one, the Y-bit is under the manual control of the
Transmit Multiframe Alignment Control Word.
AIS Select. This bit selects the criteria on which the detection of a valid Alarm
Indication Signal (AIS) is based. If zero, the criteria is less than three zeros in a two
frame period (512 bits). If one, the criteria is less than three zeros in each of two
consecutive double-frame periods (512 bits per double-frame).
Multiframe Select. This bit determines which receive multiframe signal (CRC-4 or
signalling) the RxMF (pin 42 in PLCC, 23 in MQFP) signal is aligned with. If zero,
RxMF is aligned with the receive signalling multiframe. If one, RxMF is aligned with
the receive CRC-4 multiframe.
National Bit Transmit Buffer. If one, the transmit NFAS signal originates from the
transmit national bit buffer; if zero, the transmit NFAS signal originates from the
TNU4-8 bits of page 01H, address 12H.
A one selects the corresponding S
kbits/sec. data link channel. Data link (DL) selection will function in termination mode
only; in transmit transparent mode S
control bit of page 01H, address 11H. If zero, the corresponding bits of transmit non-
frame alignment signal are programmed by the Non-Frame Alignment Control Word
(page 01H, address 12H).
Table 14 - Mode Selection Control Word
(Page 01H, Address 11H)
Zarlink Semiconductor Inc.
MT9075B
Functional Description
Functional Description
38
a
bits of the NFA signal for 4, 8, 12, 16 or 20
a4
is automatically selected - see TxTRSP
Data Sheet