kfm2g16q2m-deb8 Samsung Semiconductor, Inc., kfm2g16q2m-deb8 Datasheet - Page 133

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kfm2g16q2m-deb8

Manufacturer Part Number
kfm2g16q2m-deb8
Description
2gb Muxonenand M-die
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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MuxOneNAND2G(KFM2G16Q2M-DEBx)
MuxOneNAND4G(KFN4G16Q2M-DEBx)
MuxOneNAND8G(KFK8G16Q2M-DEBx)
OTP and 1st Block OTP Lock Operation Flow Chart
Note 1) FBA(NAND Flash Block Address) could be omitted or any address in a single die package.
2) Data input could be done anywhere between "Start" and "Write Program Command".
3) FBA should point the unlocked area address among NAND Flash Array address map.
4) ’Write 0 to interrupt register’ step may be ignored when using INT auto mode. Refer to chapter 2.8.18.1
FBA must be an address of a chip containing OTP block that is supposed to be accessed in DDP.
* DBS, DFS is for DDP
Write ’OTP Access’ Command
Write 0 to interrupt register
Write ’DFS’, ’FBA’ of Flash
Add: F100h DQ=DFS, FBA
Write Data into DataRAM
Select DataRAM for DDP
Add: F241h DQ[15]=INT
Add: F241h DQ=0000h
Add: F220h DQ=0065h
in sector0/spare/page0
Add: F101h DQ=DBS*
low to high transition
Wait for INT register
Add: 8th Word
DQ=XXF0h
Start
2)
1)
4)
133
OTP and 1st Block OTP lock completed
Write ’BSA, BSC’ of DataRAM
Add: F200h DQ=0801h/0C01h
Write 0 to interrupt register
Automatically
Write ’FPA, FSA’ of Flash
Write Program command
Add: F241h DQ[15]=INT
Add: F107h DQ=0000h
Add: F100h DQ=FBA
Add: F241h DQ=0000h
updated
low to high transition
Write ’FBA’ of Flash
DQ=0080h or 001Ah
Wait for INT register
Update Controller
DQ[5]=1(OTP
Status Register
DQ[6]=1(OTP
Do Cold reset
Add: F220h
Add: F240h
BL
L
)
)
FLASH MEMORY
3)
4)

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