kfm2g16q2m-deb8 Samsung Semiconductor, Inc., kfm2g16q2m-deb8 Datasheet - Page 170

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kfm2g16q2m-deb8

Manufacturer Part Number
kfm2g16q2m-deb8
Description
2gb Muxonenand M-die
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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Synchronous Mode Using the INT Pin
When operating synchronously, INT is tied directly to a Host GPIO. RDY could be conneceted as one of following guides.
Asynchronous Mode Using the INT Pin
When configured to operate in an asynchronous mode, CE, AVD and OE of the MuxOneNAND are tied to corresponding pins of the
Host. CLK is tied to the Host Vss (Ground). RDY is tied to a no-connect. OE of the MuxOneNAND and Host are tied together and INT
is tied to a GPIO.
MuxOneNAND2G(KFM2G16Q2M-DEBx)
MuxOneNAND4G(KFN4G16Q2M-DEBx)
MuxOneNAND8G(KFK8G16Q2M-DEBx)
7.1.1
INT can be tied to a Host GPIO to detect the rising edge of INT, signaling the end of a command operation.
This can be configured to operate either synchronously or asynchronously as shown in the diagrams below.
The INT Pin to a Host General Purpose I/O
RDY(WAIT)
Host
GPIO
CLK
AVD
Handshaking Mode
CE
OE
COMMAND
INT
MuxOneNAND
RDY
CE
AVD
CLK
OE
INT
Host
GPIO
Vss
AVD
CE
OE
170
MuxOneNAND
Host
GPIO
CE
AVD
CLK
RDY
OE
INT
CLK
AVD
OE
CE
Non-Handshaking Mode
MuxOneNAND
CE
AVD
CLK
RDY
OE
INT
FLASH MEMORY

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