kfm2g16q2m-deb8 Samsung Semiconductor, Inc., kfm2g16q2m-deb8 Datasheet - Page 67

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kfm2g16q2m-deb8

Manufacturer Part Number
kfm2g16q2m-deb8
Description
2gb Muxonenand M-die
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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Burst Read Write Latency (BRWL) Information[14:12]
MuxOneNAND2G(KFM2G16Q2M-DEBx)
MuxOneNAND4G(KFN4G16Q2M-DEBx)
MuxOneNAND8G(KFK8G16Q2M-DEBx)
2.8.19 System Configuration 1 Register F221h (R, R/W)
This Read/Write register describes the system configuration.
F221h, default = 40C0h
Read Mode (RM)
Read Mode Information[15]
Burst Read Write Latency (BRWL)
* Default value of BRWL and HF value is BRWL=4, HF=0.
For host frequency over 66MHz, BRWL should be 6 or 7 while HF is 1.
For host frequency range of 40MHz~66MHz, BRWL should be set to 4~7 while HF is 0.
For host frequency under 40MHz, BRWL should be set to 3~7 while HF is 0.
R/W
RM
15
14
100 (default)
000~010
BRWL
BRWL
Item
Item
RM
011
101
110
RM
111
BRWL
0
1
R/W
13
12
11
3(up to 40MHz. min)
R/W
10
BL
under 40MHz
(HF=0)
Burst Read Latency /
Burst Write Latency
4
5
6
7
9
Read Mode
Definition
Definition
ECC
R/W
8
67
RDY
R/W
pol
7
Latency Cycles (Read/Write)
Asynchronous read(default)
R/W
Synchronous read
INT
pol
40MHz~66MHz
6
Read Mode
Reserved
(HF=0)
4(min.)
3(N/A)
IOBE
5
6
7
R/W
Selects between asynchronous read mode and
5
Specifies the access latency in the burst
read / write transfer for the initial access
RDY
Conf
R/W
4
synchronous read mode
FLASH MEMORY
Reser
ved
Description
Description
R
3
R/W
HF
over 66MHz
2
(HF=1)
6(min.)
3(N/A)
4(N/A)
5(N/A)
7
R/W
WM
1
BWPS
R
0

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