sed1374 ETC-unknow, sed1374 Datasheet - Page 34

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sed1374

Manufacturer Part Number
sed1374
Description
Sed1374 Embedded Memory Color Lcd Controller
Manufacturer
ETC-unknow
Datasheet

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Page 26
7 A.C. Characteristics
7.1 Bus Interface Timing
7.1.1 SH-4 Interface Timing
SED1374
X26A-A-001-02
RD/WR#
A[16:0]
D[15:0]
D[15:0]
(write)
WEn#
(read)
RDY#
CSn#
CKIO
RD#
BS#
T
CKIO
Note
Conditions: IO V
T
T
C
C
A
rise
L
L
The SH-4 Wait State Control Register for the area in which the SED1374 resides must be set to a
non-zero value. The SH-4 read-to-write cycle transition must be set to a non-zero value (with ref-
erence to BUSCLK).
= -40 C to 85 C
= 60pF (Bus/MPU Interface)
= 60pF (LCD Panel Interface)
and T
t6
t4
t8
t2
t11
t7
t9
fall
t3
for all inputs must be < 5 nsec (10% ~ 90%)
DD
t14
= 3.3V ± 10% or IO V
Figure 7-1: SH-4 Timing
DD
= 5V ± 10%
t16
t12
VALID
Epson Research and Development
t15
Hardware Functional Specification
t17
t13
t10
Vancouver Design Center
t5
Issue Date: 99/04/29

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