sed1374 ETC-unknow, sed1374 Datasheet - Page 352

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sed1374

Manufacturer Part Number
sed1374
Description
Sed1374 Embedded Memory Color Lcd Controller
Manufacturer
ETC-unknow
Datasheet

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Page 20
4.5 Test Software
BR4
OR4
MemStart
address
RevCodeReg
ter
Start
registers
enable
bits
clock;
mem space
Loop
end
SED1374
X26A-G-010-02
equ
equ
equ
equ
mfspr
andis.
andis.
oris
ori
stw
andis.
oris
ori
stw
andis.
oris
lbz
b
The test software to exercise this interface is very simple. It configures chip select 4 on the
MPC821 to map the SED1374 to an unused 64k byte block of address space and loads the
appropriate values into the option register for CS4. At that point the software runs in a tight
loop reading the 1374 Revision Code Register REG[00h], which allows monitoring of the
bus timing on a logic analyzer.
The source code for this test routine is as follows:
$120
$124
$40
FFE0
r1,IMMR
r1,r1,$ffff
r2,r0,0
r2,r2,MemStart
r2,r2,$0801
r2,BR4(r1)
r2,r0,0
r2,r2,$ffc0
r2,r2,$0708
r2,OR4(r1)
r1,r0,0
r1,r1,MemStart
r0,RevCodeReg(r1) ; read revision code into r1
Loop
; CS4 base register
; CS4 option register
; upper word of SED1374 start
; address of Revision Code Regis-
; get base address of internal
; clear lower 16 bits to 0
; clear r2
; write base address
; port size 16 bits; select GPCM;
; write value to base register
; clear r2
; address mask – use upper 10
; normal CS negation; delay CS ½
; inhibit burst
; write to option register
; clear r1
; point r1 to start of SED1374
; branch forever
Interfacing to the Motorola MPC821 Microprocessor
Epson Research and Development
Vancouver Design Center
Issue Date: 99/01/05

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