sed1374 ETC-unknow, sed1374 Datasheet - Page 78

• Manufacturer Part Number: sed1374
• Description: Sed1374 Embedded Memory Color Lcd Controller
• Manufacturer: ETC-unknow

Page 70
9 Frame Rate Calculation
SED1374
X26A-A-001-02
The following formulae are used to calculate the display frame rate.
TFT/MD-TFD and Passive Single-Panel modes
Where: f
Passive Dual-Panel mode
Where:
HDP
HNDP = Horizontal Non-Display Period = ((REG[08h] bits 4-0) + 4) x 8 Pixels
VDP
VNDP = Vertical Non-Display Period = (REG[0Ah] bits 5-0) Lines
FrameRate
PCLK
f
HDP
HNDP = Horizontal Non-Display Period = ((REG[08h] bits 4-0) + 4) x 8 Pixels
VDP
VNDP = Vertical Non-Display Period = (REG[0Ah] bits 5-0) Lines
FrameRate
PCLK
= PClk frequency (Hz)
= Horizontal Display Period = ((REG[04h] bits 6-0) + 1) x 8 Pixels
= Vertical Display Period = ((REG[06h] bits 1-0, REG[05h] bits 7-0) + 1) Lines
= PClk frequency (Hz)
= Horizontal Display Period = ((REG[04h] bits 6-0) + 1) x 8 Pixels
= Vertical Display Period = ((REG[06h] bits 1-0, REG[05h] bits 7-0) + 1) Lines
=
=
------------------------------------------------------------------------------------------------- -
2
---------------------------------------------------------------------------------------- -
HDP
HDP
+
+
HNDP
HNDP
f
f
PCLK
PCLK
VDP
VDP
----------- -
2
+
+
VNDP
VNDP
Epson Research and Development
Hardware Functional Specification
Vancouver Design Center
Issue Date: 99/04/29