sed1374 ETC-unknow, sed1374 Datasheet - Page 68

• Manufacturer Part Number: sed1374
• Description: Sed1374 Embedded Memory Color Lcd Controller
• Manufacturer: ETC-unknow

Page 60
bits 4-0
bits 4-0
bits 5-0
SED1374
X26A-A-001-02
REG[07h] FPLINE Start Position
Address = FFE7h
REG[08h] Horizontal Non-Display Period
Address = FFE8h
REG[09h] FPFRAME Start Position
Address = FFE9h
n/a
n/a
n/a
n/a
n/a
n/a
FPLINE Start Position
These bits are used in TFT/MD-TFD mode to specify the position of the FPLINE pulse.
These bits specify the delay, in 8-pixel resolution, from the end of a line of display data
(FPDAT) to the leading edge of FPLINE. This register is effective in TFT/MD-TFD mode
only (REG[01h] bit 7 = 1). This register is programmed as follows:
The following constraint must be satisfied:
Horizontal Non-Display Period
These bits specify the horizontal non-display period in 8-pixel resolution.
FPFRAME Start Position
These bits are used in TFT/MD-TFD mode to specify the position of the FPFRAME pulse.
These bits specify the number of lines between the last line of display data (FPDAT) and
the leading edge of FPFRAME. This register is effective in TFT/MD-TFD mode only
(REG[01h] bit 7 = 1).
The contents of this register must be greater than zero and less than or equal to the Vertical
Non-Display Period Register, i.e.
HorizontalNonDisplayPeriod pixels
Start Position
FPFRAME
Bit 5
FPLINEposition pixels
n/a
n/a
FPFRAMEposition lines
1 REG 09h
Start Position
FPLINE Start
Position Bit 4
Non-Display
Period Bit 4
FPFRAME
REG 07h
Horizontal
Bit 4
REG 08h
=
REG 0Ah
Start Position
FPLINE Start
Position Bit 3
Non-Display
Period Bit 3
FPFRAME
Horizontal
REG 07h
=
Bit 3
=
REG 09h
REG 08h
+
2
Start Position
FPLINE Start
Position Bit 2
Non-Display
Period Bit 2
FPFRAME
Horizontal
8
+
Bit 2
4
8
Epson Research and Development
Start Position
FPLINE Start
Position Bit 1
Hardware Functional Specification
Non-Display
Period Bit 1
FPFRAME
Horizontal
Bit 1
Vancouver Design Center
Issue Date: 99/04/29
Start Position
FPLINE Start
Position Bit 0
Read/Write
Read/Write
Read/Write
Non-Display
Period Bit 0
FPFRAME
Horizontal
Bit 0