cx25870 Conexant Systems, Inc., cx25870 Datasheet - Page 106

• Manufacturer Part Number: cx25870
• Description: Video Encoder With Adaptive Flicker Filtering And Hdtv Output
• Manufacturer: Conexant Systems, Inc.

1.0 Functional Description
1.3 Device Description
1.3.47 Sleep/Power Management
1-90
There are a number of sleep/power down options for the CX25870/871. These
options can be grouped into three different categories. The first category pertains
to power management during normal operation.
available in normal operation are also available in software or pin driven sleep
operation.
DIS_CLKO, DIS_CLKI, and XTAL_PAD_DIS bits in order, then pull the SLEEP
pin (#52) high.
• DIS_PLL bit:
• XTAL_PAD_DIS bit:
• XTL_BFO_DIS bit:
• DIS_CLKO bit:
• DACDISx/DACOFF bits:
The second category pertains to software enabled sleep operation.
• SLEEP_EN bit:
• PLL_KEEP_ALIVE bit:
• DIS_CLKI bit:
The third category relates to the pin driven sleep operation.
• SLEEP pin:
To achieve additional power savings, all the power management options
For the lowest possible power consumption, set the XTL_BFO_DIS,
In nonsleep mode, when an external clock is being used, and the PLL is not
needed, this bit will disable the PLL function.
Setting this bit forces the crystal oscillator circuit to completely shut down.
This requires the CX25870/871 to switch over to an external clock or the
RESET* pin needs to be pulsed low to recover.
This disables the crystal buffer when it is not needed.
This will disable the CLKO output pin when not needed, i.e., an external
clock is used in slave interface or to reduce sleep current.
Each individual DAC can be powered down by setting its corresponding
DACDISx bit. This is useful only if some of the DACs are not being
utilized by the graphics system. The entire analog subsection of the device
can be powered-down with the DACOFF bit, allowing digital operations to
continue while reducing the power in the analog circuitry. This will achieve
a significant reduction in power while maintaining all digital functionality.
Shuts down all internal clocks except the serial port interface clock.
Disables all digital I/O pins except these: SLEEP, ALTADDR, CLKI,
CLKO, and XTAL_OUT. Disables the PLL. Turns off all DACs and
VREF; SLEEP and RESET* are never disabled.
When the PLL is used to provide a system clock, this bit keeps it
functioning if the rest of the chip is slept through either the sleep pin or
sleep bit. This bit has no affect if DIS_PLL is set.
The disable for the CLKI is separate from the sleep bit and sleep pin to
accommodate using an external clock as the clock source for the
CX25870/871 or as the PLL input.
In addition to what the SLEEP_EN bit does, the sleep pin shuts down the
serial port interface and disables the ALTADDR pin. If the SLEEP pin = 1,
the only way the encoder can return to normal operation is by resetting the
SLEEP pin in 0.
Conexant
Flicker-Free Video Encoder with Ultrascale Technology
CX25870/871
100381B