cx25870 Conexant Systems, Inc., cx25870 Datasheet - Page 34

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cx25870

Manufacturer Part Number
cx25870
Description
Video Encoder With Adaptive Flicker Filtering And Hdtv Output
Manufacturer
Conexant Systems, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
cx25870-14P
Manufacturer:
CONEXANT
Quantity:
20 000
1.0 Functional Description
1.3 Device Description
1.3.7 Master, Pseudo-Master, and Slave Interfaces
Figure 1-5. Operating the CX25870/871 in Master Interface
1-18
1.3.7.1 Master Interface
Controller
Graphics
mode, you should derive another 3:2 Solution via Super Cockpit (i.e., CX25870
register programming tool), or contact your local FAE directly. If done correctly,
this CX25870/871 register set will have PLL_32CLK (bit 5 of register 0x38) set
and adjust the timing registers appropriately.
Like its predecessor, the Bt868/869, the CX25870/871 encoder can be operated in
three possible interfaces. These connection types are named master,
pseudo-master, and slave. The clocking ability of the master device and direction
of the timing signals dictate what particular interface is used between the
Conexant encoder and graphics controller/data master device.
In master interface, CLKO, HSYNC*, VSYNC*, and BLANK*, are generated by
the encoder as outputs. These signals’ leading edges denote when a new clock
period, new line, and new frame starts respectively. Because the encoder transmits
the clock and timing signals, this interface is also referred to as clocking
master/timing master.
controller as the master device and S-Video and two Composite ports as the video
outputs.
(HSYNC*, VSYNC*, and CLKO) are required for this configuration. The
amount of inputs could grow as high as 25 if 24-bit RGB nonmultiplexed mode is
chosen as the Input Pixel Mode (i.e., IN_MODE[3:0] = 0011) by the designer.
encoder’s reference clock and send back a version of that clock at the same
frequency with the pixel data transitions synchronized to CLKI’s rising and
falling edges. This is accomplished via the VGA encoder’s clock output (CLKO)
and clock input (CLKI) ports.
If the desired overscan ratio is not available via a particular autoconfiguration
An illustration of the master interface is shown below using the graphics
A minimum of 9 inputs (CLKI and 8 lines for pixel data- P[7:0]) and 3 outputs
Master interface can only exist if the graphics controller can accept the
Delay
HSYNC*
VSYNC*
BLANK*
RGB or
YCrCb
Clock
Clock
Conexant
Flicker-Free Video Encoder with Ultrascale Technology
CLKI
CX25870/
CX25871
CLKO
Composite #1
Luma
Chroma
Composite #2
S-Video
CX25870/871
100381B
100381_054

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