cx25870 Conexant Systems, Inc., cx25870 Datasheet - Page 107

• Manufacturer Part Number: cx25870
• Description: Video Encoder With Adaptive Flicker Filtering And Hdtv Output
• Manufacturer: Conexant Systems, Inc.

A complete register bit map CX25870/871 is displayed in
otherwise. For bit descriptions and detailed programming information, follow the register bit map below. All
registers are set to their default state following a software reset. A software reset is always performed at
power-up. After power-up, a reset can be triggered by to writing the SRESET register bit.
Table 2-1. Register Bit Map (* Indicates Read-Only Register) (1 of 4)
100381B
Address
8-Bit
38
*00
*02
*04
*06
28
2E
30
32
34
36
3A
3C
3E
40
42
44
46
48
(1)
ADPT_FF
MONSTAT_A MONSTAT_B
Reserved
MONSTAT_A MONSTAT_B
HDTV_EN
SLEEP_EN
AUTO_CHK
FFRTN
Reserved
Reserved
MSC_DB[23:16]
MSC_DB[31:24]
D7
SECAM
RGB2PRPB
XTAL_PAD_
DIS
Reserved
YSELECT
PIX_DOUBLE
Reserved
ID[2:0]
D6
DRVS[1:0]
2.0 Internal Registers
2
MONSTAT_C
PLL_RESET_
OUT
MONSTAT_C
RPR_SYNC_D
IS
XTL_BFO_
DIS
Reserved
PLL_32CLK
Reserved
D5
CCSTAT_E
PLL_LOCK
MONSTAT_D
GY_SYNC_DIS
PLL_KEEP_
ALIVE
SETUP_HOLD_A
DJ
C_ALTFF[1:0]
DIV2
14318_XTAL
C_THRESH[2:0]
Conexant
SERIALTEST[7:0]
D4
MSC_DB[15:8]
MCOMPY[7:0]
MCOMPU[7:0]
MCOMPV[7:0]
MSC_DB[7:0]
Table
CCSTAT_0
FIFO_OVER
BPB_SYNC_D
IS
DIS_CLKI
IN_MODE[3] DATDLY_RE
HBURST_
END[8]
HALF_CLKO
2-1. All registers are read/write unless denoted
D3
VERSION[4:0]
FIFO_UNDER
HD_SYNC_
EDGE
DIS_PLL
Reserved
HBURST_
BEGINS[8]
PLL_DIV10
FIELD_CNT[2:0]
FIELD_CNT[3:0]
D2
Y_THRESH[2:0]
PAL
DIS_CLKO
OFFSET_
RGB
Y_ALTFF[1:0]
V_LINESI
[10]
PLL_INPUT DIV2_
RASTER_SEL[1:0]
D1
Reserved
CSC_SEL
H_BLANKI
[9]
LATCH
Reserved
D0
2-1