cx25870 Conexant Systems, Inc., cx25870 Datasheet - Page 40

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cx25870

Manufacturer Part Number
cx25870
Description
Video Encoder With Adaptive Flicker Filtering And Hdtv Output
Manufacturer
Conexant Systems, Inc.
Datasheet

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Part Number
Manufacturer
Quantity
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Part Number:
cx25870-14P
Manufacturer:
CONEXANT
Quantity:
20 000
1.0 Functional Description
1.3 Device Description
Table 1-10. Pseudo-Master Interface with a BLANK* Input to the CX25870/871
Table 1-11. Slave Interface without a BLANK* Signal
1-24
PSEUDO MASTER
BLANK* SIGNAL
transmitted to the
CX25870/871 and
received as an input.
SLAVE
BLANK* is NOT
included as part
of the interface.
Interfaced Used
Interfaced Used
of 0xBA) ORed
with Slave Pin
SLAVER (Bit 5
0xBA) ORed with
SLAVER (Bit 5 of
1
Slave Pin
1
• SLAVER bit = 1 so the CX25870/871 is the video timing slave. It expects
• EN_BLANKO is high(=1), signifying the CX25870/871's BLANK* port
• EN_DOT = 0 telling the CX25870/871 to use its internal counters to
• EN_OUT = 1 ensures there is a clock output (CLKO) from the
• SLAVER bit = 1 so the CX25870/871 is the video timing slave. It expects
• EN_BLANKO is low (= 0), signifying the CX25870/871's BLANK* port
• EN_DOT = 1 telling the CX25870/871 to use the BLANK* signal it is
• EN_OUT = 1 ensures there is a clock output (CLKO) from the
• After an autoconfiguration command, the CX25870/871 expects active
• In addition to
to receive the syncs from the graphics controller.
is an output or that NO BLANK* signal is used as part of the system.
determine the active versus the blanking regions.
CX25870/871.
to receive the syncs from the graphics controller.
is an input.
receiving to determine where active video starts (rising edge of BLANK*)
and where the blanking region starts (falling edge).
CX25870/871.
low VSYNC* and HSYNC* signals from the controller. The format of
pixels at input of encoder needs to be 24-bit RGB multiplexed unless
modifications are made to the IN_MODE[3:0] 4-bit sequence.
this interface. The most significant bit of CX25870/871 register 0xA0
must be set. This guarantees that EN_XCLK is high (=1) which will allow
the CX25870/871 to accept CLKI as the pixel clock source.
Register 0xC6)
EN_BLANKO
(MSb of
1
EN_BLANKO (MSb
of Register 0xC6)
Conexant
Table
0
1-11, another bit must be programmed manually with
Flicker-Free Video Encoder with Ultrascale Technology
EN_DOT (Bit 6
of Register
0xC6)
0
EN_DOT (Bit 6 of
Register 0xC6)
EN_OUT (LSb of
Register 0xC4)
1
0
EN_OUT (LSb of
Register 0xC4)
EN_XCLK (MSb
CX25870/871
of Register
0xA0)
1
1
100381B

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