h8s-2138 Renesas Electronics Corporation., h8s-2138 Datasheet - Page 119

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h8s-2138

Manufacturer Part Number
h8s-2138
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Figure 2.16 shows the stack after exception handling ends.
2.8.4
In this state the CPU executes program instructions in sequence.
2.8.5
This is a state in which the bus has been released in response to a bus request from a bus master
other than the CPU. While the bus is released, the CPU halts except for internal operations.
There is one other bus master in addition to the CPU: the data transfer controller (DTC).
For further details, refer to section 6, Bus Controller.
2.8.6
The power-down state includes both modes in which the CPU stops operating and modes in which
the CPU does not stop. There are five modes in which the CPU stops operating: sleep mode,
software standby mode, hardware standby mode, subsleep mode, and watch mode. There are also
three other power-down modes: medium-speed mode, module stop mode, and subactive mode. In
medium-speed mode, the CPU and other bus masters operate on a medium-speed clock. Module
Normal mode
Note: * Ignored when returning.
SP
Program Execution State
Bus-Released State
Power-Down State
Figure 2.16 Stack Structure after Exception Handling (Examples)
(16 bits)
CCR
CCR *
PC
Advanced mode
SP
Rev. 4.00 Jun 06, 2006 page 65 of 1004
(24 bits)
CCR
PC
REJ09B0301-0400
Section 2 CPU

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