h8s-2138 Renesas Electronics Corporation., h8s-2138 Datasheet - Page 700

• Manufacturer Part Number: h8s-2138
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 22 ROM
22.7
In the on-board programming modes, flash memory programming and erasing is performed by
software, using the CPU. There are four flash memory operating modes: program mode, erase
mode, program-verify mode, and erase-verify mode. Transitions to these modes can be made by
setting the PSU and ESU bits in FLMCR2, and the P, E, PV, and EV bits in FLMCR1.
The flash memory cannot be read while being programmed or erased. Therefore, the program that
controls flash memory programming/erasing (the programming control program) should be
located and executed in on-chip RAM or external memory.
Notes: 1. Operation is not guaranteed if setting/resetting of the SWE, EV, PV, E, and P bits in
22.7.1
Follow the procedure shown in the program/program-verify flowchart in figure 22.12 to write data
or programs to flash memory. Performing program operations according to this flowchart will
enable data or programs to be written to flash memory without subjecting the device to voltage
stress or sacrificing program data reliability. Programming should be carried out 128 bytes at a
time.
The wait times (x, y, z1, z2, z3, , ß,
memory control registers 1 and 2 (FLMCR1, FLMCR2) and the maximum number of writes (N)
are shown in section 25, Electrical Characteristics, Flash Memory Characteristics.
Following the elapse of (x) µs or more after the SWE bit is set to 1 in flash memory control
register 1 (FLMCR1), 128-byte program data is stored in the program data area and reprogram
data area, and the 128-byte data in the reprogram data area written consecutively to the write
addresses. The lower 8 bits of the first address written to must be H'00 or H'80. 128 consecutive
byte data transfers are performed. The program address and program data are latched in the flash
memory. A 128-byte data transfer must be performed even if writing fewer than 128 bytes; in this
case, H'FF data must be written to the extra addresses.
Next, the watchdog timer is set to prevent overprogramming in the event of program runaway, etc.
Set a value greater than (y + z2 +
for program mode (program setup) is carried out by setting the PSU bit in FLMCR2, and after the
elapse of (y) µs or more, the operating mode is switched to program mode by setting the P bit in
Rev. 4.00 Jun 06, 2006 page 646 of 1004
REJ09B0301-0400
2. Perform programming in the erased state. Do not perform additional programming on
Programming/Erasing Flash Memory
Program Mode
FLMCR1, and the ESU and PSU bits in FLMCR2, is executed by a program in flash
memory.
previously programmed addresses.
(H8S/2138 F-ZTAT A-Mask Version, H8S/2134 F-ZTAT A-Mask Version)
+ ) s as the WDT overflow period. After this, preparation
after setting/clearing individual bits in flash