h8s-2138 Renesas Electronics Corporation., h8s-2138 Datasheet - Page 581

• Manufacturer Part Number: h8s-2138
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

17.2
17.2.1
SYSCR is an 8-bit readable/writable register which controls H8S/2138 Group chip operations. Of
the host interface registers, HICR, IDR1, ODR1, STR1, IDR2, ODR2, and STR2 can only be
accessed when the HIE bit is set to 1. The host interface CS2 and ECS2 pins are controlled by the
CS2E bit in SYSCR and the FGA20E bit in HICR. See section 3.2.2, System Control Register
(SYSCR), and section 5.2.1, System Control Register (SYSCR), for information on other SYSCR
bits. SYSCR is initialized to H'09 by a reset and in hardware standby mode.
Bit 7—CS2 Enable Bit (CS2E): Used together with the FGA20E bit in HICR to select the pin
that performs the CS2 function.
Bit 1—Host Interface Enable (HIE): Enables or disables CPU access to the host interface
registers. When enabled, the host interface registers (HICR, IDR1, ODR1, STR1, IDR2, ODR2,
and STR2) can be accessed.
SYSCR
Bit 7
CS2E
0
1
Bit 1
HIE
0
1
Bit
Initial value
Read/Write
Register Descriptions
System Control Register (SYSCR)
HICR
Bit 0
FGA20E
0
1
0
1
Description
Host interface register (HICR, IDR1, ODR1, STR1, IDR2, ODR2, STR2), CPU
access is disabled
Host interface register (HICR, IDR1, ODR1, STR1, IDR2, ODR2, STR2), CPU
access is enabled
CS2E
R/W
7
0
Description
CS2 pin function halted (CS2 fixed high internally)
CS2 pin function selected for P81/CS2 pin
CS2 pin function selected for P90/ECS2 pin
IOSE
R/W
6
0
INTM1
R
5
0
INTM0
R/W
4
0
Section 17 Host Interface [H8S/2138 Group]
Rev. 4.00 Jun 06, 2006 page 527 of 1004
XRST
R
3
1
NMIEG
R/W
2
0
R/W
HIE
REJ09B0301-0400
1
0
(Initial value)
(Initial value)
RAME
R/W
0
1