h8s-2138 Renesas Electronics Corporation., h8s-2138 Datasheet - Page 744
h8s-2138
Manufacturer Part Number
h8s-2138
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2138.pdf
(1061 pages)
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Section 24 Power-Down State
Bit 4—Prescaler Select (PSS): Selects the WDT1 TCNT input clock.
This bit also controls the operation in a power-down mode transition. The operating mode to
which a transition is made after execution of a SLEEP instruction is determined in combination
with other control bits.
For details, see the description of Clock Select 2 to 0 in section 14.2.2, Timer Control/Status
Register (TCSR).
Bit 4
PSS
0
1
Note:
24.2.4
MSTPCR comprises two 8-bit readable/writable registers that perform module stop mode control.
MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Rev. 4.00 Jun 06, 2006 page 690 of 1004
REJ09B0301-0400
Bit
Initial value
Read/Write
* When a transition is made to watch mode or subactive mode, high-speed mode must
Module Stop Control Register (MSTPCR)
be set.
Description
TCNT counts -based prescaler (PSM) divided clock pulses
When a SLEEP instruction is executed in high-speed mode or medium-speed mode,
a transition is made to sleep mode or software standby mode
TCNT counts SUB-based prescaler (PSM) divided clock pulses
When a SLEEP instruction is executed in high-speed mode or medium-speed mode,
a transition is made to sleep mode, watch mode * , or subactive mode *
When a SLEEP instruction is executed in subactive mode, a transition is made to
subsleep mode, watch mode, or high-speed mode
MSTP15
R/W
7
0
MSTP14
R/W
6
0
MSTP13
R/W
5
1
MSTPCRH
MSTP12
R/W
4
1
MSTP11
R/W
3
1
MSTP10
R/W
2
1
MSTP9
R/W
1
1
MSTP8
R/W
0
1
MSTP7
R/W
7
1
MSTP6
R/W
6
1
MSTP5
R/W
5
1
MSTPCRL
MSTP4
R/W
4
1
MSTP3
R/W
3
1
MSTP2
R/W
2
1
(Initial value)
MSTP1
R/W
1
1
MSTP0
R/W
0
1
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