h8s-2138 Renesas Electronics Corporation., h8s-2138 Datasheet - Page 523

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h8s-2138

Manufacturer Part Number
h8s-2138
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Bit 6—I
bus interface to the CPU.
Bit 5—Master/Slave Select (MST)
Bit 4—Transmit/Receive Select (TRS)
MST selects whether the I
TRS selects whether the I
In master mode with the I
hardware, causing a transition to slave receive mode. In slave receive mode with the addressing
format (FS = 0 or FSX = 0), hardware automatically selects transmit or receive mode according to
the R/W bit in the first frame after a start condition.
Modification of the TRS bit during transfer is deferred until transfer of the frame containing the
acknowledge bit is completed, and the changeover is made after completion of the transfer.
MST and TRS select the operating mode as follows.
Bit 7
ICE
0
1
Bit 6
IEIC
0
1
2
C Bus Interface Interrupt Enable (IEIC): Enables or disables interrupts from the I
Description
I
Internal state initialization of I
SAR and SARX can be accessed
I
driving the bus)
ICMR and ICDR can be accessed
Description
Interrupts disabled
Interrupts enabled
2
2
C bus interface module disabled, with SCL and SDA signal pins set to port function
C bus interface module enabled for transfer operations (pins SCL and SCA are
2
2
2
C bus interface operates in transmit mode or receive mode.
C bus format, when arbitration is lost, MST and TRS are both reset by
C bus interface operates in master mode or slave mode.
2
C bus interface module
Section 16 I
Rev. 4.00 Jun 06, 2006 page 469 of 1004
2
C Bus Interface [H8S/2138 Group Option]
REJ09B0301-0400
(Initial value)
(Initial value)
2
C

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