h8s-2138 Renesas Electronics Corporation., h8s-2138 Datasheet - Page 39

• Manufacturer Part Number: h8s-2138
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Figure 12.10
Figure 12.11
Figure 12.12
Figure 12.13
Figure 12.14
Figure 12.15
Section 13 Timer Connection [H8S/2138 Group]
Figure 13.1
Figure 13.2
Figure 13.3
Figure 13.4
Figure 13.5
Figure 13.6
Figure 13.7
Figure 13.8
Figure 13.9
Section 14 Watchdog Timer (WDT)
Figure 14.1 (a) Block Diagram of WDT0 .................................................................................. 372
Figure 14.1 (b) Block Diagram of WDT1 .................................................................................. 373
Figure 14.2
Figure 14.3
Figure 14.4
Figure 14.5
Figure 14.6
Section 15 Serial Communication Interface (SCI, IrDA)
Figure 15.1
Figure 15.2
Figure 15.3
Figure 15.4
Figure 15.5
Figure 15.6
Figure 15.7
Timing of Input Capture Signal (When Input Capture Input Signal Enters
while TICRR and TICRF Are Being Read)....................................................... 331
Switching of Input Capture Signal .................................................................... 331
Pulse Output (Example) .................................................................................... 334
Contention between TCNT Write and Clear ..................................................... 335
Contention between TCNT Write and Increment.............................................. 336
Contention between TCOR Write and Compare-Match.................................... 337
Block Diagram of Timer Connection Facility ................................................... 342
Timing Chart for PWM Decoding..................................................................... 356
Timing Chart for Clamp Waveform Generation (CL1 and CL2 Signals) ......... 358
Timing Chart for Clamp Waveform Generation (CL3 Signal).......................... 358
Timing Chart for Measurement of IVI Signal and IHI Signal Divided
Waveform Periods ............................................................................................. 360
2fH Modification Timing Chart ........................................................................ 361
Fall Modification/IHI Synchronization Timing Chart....................................... 363
IVG Signal/IHG Signal/CL4 Signal Timing Chart............................................ 366
CBLANK Output Waveform Generation .......................................................... 369
Format of Data Written to TCNT and TCSR (Example of WDT0) .................. 380
Operation in Watchdog Timer Mode................................................................. 382
Operation in Interval Timer Mode..................................................................... 383
Timing of OVF Setting...................................................................................... 383
Contention between TCNT Write and Increment.............................................. 384
Block Diagram of SCI ....................................................................................... 389
Data Format in Asynchronous Communication
(Example with 8-Bit Data, Parity, Two Stop Bits) ............................................ 419
Relation between Output Clock and Transfer Data Phase
(Asynchronous Mode) ....................................................................................... 421
Sample SCI Initialization Flowchart ................................................................. 422
Sample Serial Transmission Flowchart ............................................................. 423
Example of Operation in Transmission in Asynchronous Mode
(Example with 8-Bit Data, Parity, One Stop Bit) .............................................. 425
Sample Serial Reception Data Flowchart .......................................................... 426
Rev. 4.00 Jun 06, 2006 page xxxix of liv