h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 305
h8s-2172
Manufacturer Part Number
h8s-2172
Description
Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2172.pdf
(570 pages)
- Current page: 305 of 570
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9.5.4
TCNT is cleared when compare match A or B occurs, depending on the setting of the CCLR1 and
CCLR0 bits in TCR. Figure 9.7 shows the timing of this operation.
9.5.5
TCNT is cleared at the rising edge of an external reset input, depending on the settings of the
CCLR1 and CCLR0 bits in TCR. The clear pulse width must be at least 1.5 states. Figure 9.8
shows the timing of this operation.
9.5.6
The OVF in TCSR is set to 1 when TCNT overflows (changes from H'FF to H'00). Figure 9.9
shows the timing of this operation.
φ
Compare match
signal
TCNT
φ
External reset
input pin
Clear signal
TCNT
Timing of Compare Match Clear
Timing of TCNT External Reset
Timing of Overflow Flag (OVF) Setting
Figure 9.8 Timing of Clearance by External Reset
Figure 9.7 Timing of Compare Match Clear
N–1
N
N
Rev. 2.00, 03/04, page 273 of 534
H'00
H'00
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