KSZ8851-16MLLJ_10 MICREL [Micrel Semiconductor], KSZ8851-16MLLJ_10 Datasheet - Page 55

• Manufacturer Part Number: KSZ8851-16MLLJ_10
• Description: Single-Port Ethernet MAC Controller with 8-Bit or 16-Bit Non-PCI Interface
• Manufacturer: MICREL [Micrel Semiconductor]

Transmit Control Register (0x70 – 0x71): TXCR
This register holds control information programmed by the CPU to control the QMU transmit module function.
March 2010
Micrel, Inc.
Bit
15-9
8
7
6
5
4
3
2
1
0
-
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Default Value
R/W
RO
RW
RO
RW
RW
RW
RW
RW
RW
RW
Description
Reserved.
TCGICMP Transmit Checksum Generation for ICMP
When this bit is set, The KSZ8851-16MLLJ is enabled to transmit ICMP frame (only for
non-fragment frame) checksum generation.
Reserved.
TCGTCP Transmit Checksum Generation for TCP
When this bit is set, The KSZ8851-16MLLJ is enabled to transmit TCP frame
checksum generation.
TCGIP Transmit Checksum Generation for IP
When this bit is set, The KSZ8851-16MLLJ is enabled to transmit IP header checksum
generation.
FTXQ Flush Transmit Queue
When this bit is set, The transmit queue memory is cleared and TX frame pointer is
reset.
Note: Disable the TXE transmit enable bit[0] first before set this bit, then clear this bit
to normal operation.
TXFCE Transmit Flow Control Enable
When this bit is set and the KSZ8851-16MLLJ is in full-duplex mode, flow control is
enabled. The KSZ8851-16MLLJ transmits a PAUSE frame when the Receive Buffer
capacity reaches a threshold level that will cause the buffer to overflow.
When this bit is set and the KSZ8851-16MLLJ is in half-duplex mode, back-pressure
flow control is enabled. When this bit is cleared, no transmit flow control is enabled.
TXPE Transmit Padding Enable
When this bit is set, the KSZ8851-16MLLJ automatically adds a padding field to a
packet shorter than 64 bytes.
Note: Setting this bit requires enabling the add CRC feature (bit1=1) to avoid CRC
errors for the transmit packet.
TXCE Transmit CRC Enable
When this bit is set, the KSZ8851-16MLLJ automatically adds a 32-bit CRC checksum
field to the end of a transmit frame.
TXE Transmit Enable
When this bit is set, the transmit module is enabled and placed in a running state.
When reset, the transmit process is placed in the stopped state after the transmission
of the current frame is completed.
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M9999-030210-1.0
KSZ8851-16MLLJ