KSZ8851-16MLLJ_10 MICREL [Micrel Semiconductor], KSZ8851-16MLLJ_10 Datasheet - Page 68

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KSZ8851-16MLLJ_10

Manufacturer Part Number
KSZ8851-16MLLJ_10
Description
Single-Port Ethernet MAC Controller with 8-Bit or 16-Bit Non-PCI Interface
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
Chip Global Control Register (0xC6 – 0xC7): CGCR
This register contains the global control for the chip function.
Indirect Access Control Register (0xC8 – 0xC9): IACR
This register contains the indirect control for the MIB counter (Write IACR triggers a command. Read access is
determined by bit 12).
0xCA – 0xCF: Reserved
Indirect Access Data Low Register (0xD0 – 0xD1): IADLR
This register contains the indirect data (low word) for MIB counter.
March 2010
Micrel, Inc.
Bit
15-12
11-10
9
8
7-0
Bit
15-13
12
11-10
9-5
4-0
Bit
15-0
0x0
0x0
0x0
-
Default
0x0
0x2
0x35
Default
0x0
0x0
0x00
Default
0x0000
R/W
RW
RW
RW
R/W
RW
R/W
RW
RW
RW
RW
RW
R/W
RW
Description
Reserved.
Reserved.
LEDSEL0
This bit sets the LEDSEL0 selection for P1LED1 and P1LED0. PHY port LED indicators,
defined as below:
Reserved.
Reserved.
Description
Reserved.
Read Enable.
1 = Read cycle is enabled (MIB counter will clear after read).
0 = No operation.
Table Select
00 = reserved.
01 = reserved.
10 = reserved.
11 = MIB counter selected.
Reserved.
Indirect Address
Bit 4-0 of indirect address for 32 MIB counter locations.
Description
Indirect Low Word Data
Bit 15-0 of indirect data.
P1LED1
P1LED0
LINK/ACT
100BT
68
0
LEDSEL0 (bit9)
LINK
ACT
1
M9999-030210-1.0
KSZ8851-16MLLJ

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