KSZ8851-16MLLJ_10 MICREL [Micrel Semiconductor], KSZ8851-16MLLJ_10 Datasheet - Page 61

• Manufacturer Part Number: KSZ8851-16MLLJ_10
• Description: Single-Port Ethernet MAC Controller with 8-Bit or 16-Bit Non-PCI Interface
• Manufacturer: MICREL [Micrel Semiconductor]

RXQ Command Register (0x82 – 0x83): RXQCR (Continued)
TX Frame Data Pointer Register (0x84 – 0x85): TXFDPR
The value of this register determines the address to be accessed within the TXQ frame buffer. When the AUTO increment
is set, It will automatically increment the pointer value on write accesses to the data register.
The counter is incremented by one for every byte access, by two for every word access, and by four for every double
word access.
March 2010
Micrel, Inc.
Bit
2-1
0
Bit
15
14
13-11
10-0
-
0x0
-
0x0
-
Default Value
Default Value
0x000
R/W
RW
RW
R/W
RO
RW
RO
RO
Description
Reserved.
RRXEF Release RX Error Frame
When this bit is written as 1, the current RX error frame buffer is released.
Note: This bit is self-clearing after the frame memory is released. The software should
wait for the bit to be cleared before processing new RX frame.
Description
Reserved.
TXFPAI TX Frame Data Pointer Auto Increment
When this bit is set, the TX Frame data pointer register increments automatically on
accesses to the data register. The increment is by one for every byte access, by two for
every word access, and by four for every doubleword access.
When this bit is reset, the TX frame data pointer is manually controlled by user to access
the TX frame location.
Reserved.
TXFP TX Frame Pointer
TX Frame Pointer index to the Frame Data register for access.
This field reset to next available TX frame location when the TX Frame Data has been
enqueued through the TXQ command register.
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KSZ8851-16MLLJ