KSZ8851-16MLLJ_10 MICREL [Micrel Semiconductor], KSZ8851-16MLLJ_10 Datasheet - Page 75
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KSZ8851-16MLLJ_10
Manufacturer Part Number
KSZ8851-16MLLJ_10
Description
Single-Port Ethernet MAC Controller with 8-Bit or 16-Bit Non-PCI Interface
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
1.KSZ8851-16MLLJ_10.pdf
(90 pages)
- Current page: 75 of 90
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Port 1 PHY Special Control/Status, LinkMD (0xF4 – 0xF5): P1SCLMD (Continued)
Port 1 Control Register (0xF6 – 0xF7): P1CR
This register contains the global per port control for the chip function.
March 2010
11
10
9
8-0
Micrel, Inc.
Bit
15
14
13
12
11
10
9
8
7
0
0
0
0x000
Default
0
0
0
0
0
0
0
0
1
RW
RO
RW
RO
R/W
RW
RW
RW
RW
RW
RW
RW
RW
RW
Force_lnk
Force link.
1 = force link pass; 0 = normal operation.
Reserved.
Remote (Near-end) loopback (rlb)
1 = perform remote loopback at PHY
(RXP1/RXM1 -> TXP1/TXM1, see Figure 10)
0 = normal operation
Vct_fault_count
VCT fault count.
Distance to the fault. It’s approximately
0.4m*vct_fault_count.
Description
LED Off
1 = Turn off all of the port 1 LEDs (P1LED3,
P1LED2, P1LED1, P1LED0). These pins are driven
high if this bit is set to one.
0 = normal operation.
Txids
1 = disable the port’s transmitter.
0 = normal operation.
Restart AN
1 = restart auto-negotiation.
0 = normal operation.
Reserved
Reserved
Disable auto MDI/MDI-X
1 = disable auto MDI/MDI-X function.
0 = enable auto MDI/MDI-X function.
Force MDI-X
1= if auto MDI/MDI-X is disabled, force PHY into
MDI-X mode.
0 = do not force PHY into MDI-X mode.
Reserved
Auto Negotiation Enable
1 = auto negotiation is enabled.
0 = disable auto negotiation, speed, and duplex are
decided by bits 6 and 5 of the same register.
75
Bit is same as:
Bit 0 in P1MBCR
Bit 1 in P1MBCR
Bit 9 in P1MBCR
Bit 3 in P1MBCR
Bit 4 in P1MBCR
Bit 12 in P1MBCR
M9999-030210-1.0
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